Statement of originality:

This original tutorial was created by ALINX Electronic Technology (Shanghai) Co., Ltd. (ALINX), and the copyright belongs to the company. If you want to reprint, you need to authorize and indicate the source.

Applicable board models:

AXU2CGA/AXU2CGB/AXU3EG/AXU4EV-E/AXU4EV-P/AXU5EV-E/AXU5EV-P /AXU9EG/AXU15EG

The experimental Vivado project directory is “ps_emio/vivado”.

The experimental vitis project directory is “ps_emio/vitis”.

If you want to use PS to light up the LED light of PL, how to do it? One is to control the LED light at the PL end through EMIO, and the other is to realize control through the IP of AXI GPIO. This chapter introduces how to use EMIO to control the LED lights on the PL end. At the same time, it also introduces how to use EMIO to connect the PL terminal button to control the PL terminal LED light.

1. Principle introduction

Let’s first understand the GPIO BANK distribution. From the figure, we can see that there are 78 MIOs in BANK0~BANK2. There are 96 EMIOs in BANK3~BANK5, this chapter is to use EMIO to control PL terminal LED.

FPGA engineer job content

The following is the FPGA engineer responsible for the content.

2. Vivado project establishment

1) Based on the ps_hello project, save it as a project named ps_emio, open the ZYNQ configuration, and check GPIO EMIO. Use 1 LED and 1 button on the PL side to select the EMIO bit width as 2 bits in the MIO configuration, and click OK after the configuration is complete.

2) Right-click the extra GPIO_0 port and select Make External to export the port signal

3) Click on the pin and change the pin name to emio, you can also change the name according to your needs. Save the design.

4) Right-click xx.bd and select Generate Output Products to regenerate the output file

5) After the end, the top-level file will be updated with new pins, which need to be pin-bound below

3. The XDC file constrains the PL pins

1) Create a new XDC file and bind the PL pin

Set the file name to emio

2) Add content to emio.xdc, the port name must be consistent with the top-level file port

##################Compress Bitstream############################set_property BITSTREAM.GENERAL.COMPRESS TRUE [current_design]set_property IOSTANDARD LVCMOS33 [get_ports {emio_tri_io[*]}]#pl ledset_property PACKAGE_PIN W13 [get_ports {emio_tri_io[0]}]#pl keyset_property PACKAGE_PIN AA13 [get_ports {emio_tri_io[1]}]

3) Generate bit file

4) Although the logic on the PL side is not used, the pins on the PL side are used, so you should choose “Include bitstream” to export the hardware

Software Engineer Job Content

The following is the responsibility of software engineers.

4. Vitis programming

4.1 EMIO lights up the LED at the PL end

The figure below is the control block diagram of GPIO. In the experiment, the registers of the output part, the data register DATA, the data mask registers MASK_DATA_LSW, MASK_DATA_MSW, the direction control register DIRM, and the output enable controller OEN will be used.

It may be difficult to start writing the code at the beginning. We can import the example project provided by Xilinx, find psu_gpio_0 in the BSP, and click Import Examples

Select “xgpiops_polled_example” in the pop-up window and click OK

A new APP project will appear

1) This example project is to test the input and output of MIO on the PS side. Since the LED is derived from EMIO, the MIO number of EMIO starts from 78. You need to modify the Output_pin to 78 in the file to test the LED light.

Since we only test the LED light, which is the output, we comment out the input function. save document.

2) Compile the project

3) Run AsLaunch on Hardware (Single Application Debug), after the download is complete, you can see that PS_LED flashes 16 times quickly

4) Although it is more convenient to use the official example, its code looks bloated. We can simplify and write it by ourselves by learning its method. We create a new APP project. You can right-click NewApplication Project in the blank space. Modify in helloworld.c of ps_led_test. In fact, the program steps are very simple, initialize the GPIO to set the direction output enable to control the GPIO output value.

first page skip

Select the hardware description project

Fill in the project name and select the corresponding CPU

Next step

Just select Hello World as the template

5) It can be seen that there is an additional APP project, which is still based on the BSP named standalone on psu_cortexa53_0, which is a Domain, and shares a BSP with the previous example project

6) You can copy the code of the routine to helloworld.c, save and Build Project

7) Compile and download

You can see that LED1 is blinking.

4.2 EMIO realizes PL end button interrupt

It was introduced earlier that EMIO is used as an output to control LED lights. Here we will talk about using EMIO as a key input to control LED lights.

1) Look at the GPIO structure diagram and interrupt register through the ug1085 document:

INT_MASK: interrupt mask

INT_DIS: interrupt disabled

INT_EN: interrupt enable

INT_TYPE: Interrupt type, set level sensitive or edge sensitive

INT_POLARITY: Interrupt polarity, set low level or falling edge or high level or rising edge

INT_ANY: Edge-triggered mode, need INT_TYPE set to edge-sensitive to use

INT_TYPE, INT_POLARITY, and INT_ANY need to be used together when setting the interrupt generation method. Please refer to the ug1085 section for the specific register meaning.

2) This experiment is designed to turn on the LED when the button is pressed, and then turn off the LED when the button is pressed.

The main program design process is as follows:

GPIO initialization setting button and LED direction setting interrupt mode setting interrupt enable interrupt controller enable interrupt exception enable GPIO interrupt judge KEY_FLAG value is 1, write LED

Interrupt processing flow:

Query the interrupt status register, judge the status, clear the interrupt, set the KEY_FLAG value

3) Create a new project named emio_key, the template is hello world, copy the program of the routine

4) Define the PS key number as 79 and the PS LED as 78

5) In the main function, set the LED and key, and set the key interrupt type to rising edge to generate an interrupt. In this experiment, the rising edge of the key signal generates an interrupt.

6) The interrupt controller setting function IntrInitFuntions is made with reference to the PS timer interrupt experiment, and the following statement is to set the interrupt priority and trigger mode. That is, operate the ICDIPR and ICDICFR registers.

7) In the interrupt service program GpioHandler, judge the interrupt status register, clear the interrupt, and set the button flag to 1.

8) In the main function, judge the key flag key_flag, and write data to the LED.

9) Compile the project and download the program, observe the experimental phenomenon, and press KEY1 to control the LED1 light to turn on and off.

5. Fix program

We have introduced how to generate a firmware program without an FPGA loading file (for details, refer to the chapter “Experience ARM, Bare Metal Output” Hello World”). This chapter has generated an FPGA loading file, and here is a demonstration of how to generate a firmware program.

Same as before, click system, right click Build Project

The software will automatically add three files, the first is the boot program fsbl.elf, the second is the bitstream of the FPGA, and the third is the application program xx.elf. The download method is the same as before, so I won’t repeat it here.

6. Common mistakes in pin binding

1) In the block design design, as shown in the figure below, the pin names of the GPIO module are set to leds and keys. Many people take it for granted to bind pins according to such names in XDC.

If you open the top-level file, you will find that the pin names are different. Be sure to check carefully, and the pin names in the top-level file shall prevail.

Otherwise, the following pin unbound error will occur

2) If it is a handwritten XDC file, remember to pay attention to the spaces, which is also a very common mistake

7. Sections of this chapter

This chapter has further studied the use of EMIO on the PS side. Although the EMIO is connected to the pin on the PL side, the usage in Vitis is still the same. From this example, we can also see that once it is connected to the PL side, it needs to generate bitstream, though produces little logic.

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