Keywords: ultrascale +, MPSoC, 3D IC


Based on the success of Xilinx’s 20nm ultrascale MT series, Xilinx has launched a new 16nm ultrascale + Series FPGA, 3D IC and MPSoC. With new memory, 3d-on-3d and multiprocessing SOC (MPSoC) technology, Xilinx has once again realized the value advantage of a generation ahead. In addition, in order to achieve higher performance and integration, the ultrascale + series also adopts a new interconnection optimization technology – smartconnect. These new devices further expand Xilinx’s ultrascale product series (now spanning from 20nm to 16nm FPGA, SOC and 3D IC devices), and greatly improve the performance power consumption ratio by using TSMC’s 16ff + FinFET 3D transistor technology. Thanks to the proven 20nm ultrascale architecture, vivado design tools and the 16nmff + technology of TSMC, the world’s leading service foundry, Xilinx has realized FinFET programmable technology with the lowest risk and the greatest value.

Through system level optimization, the value provided by ultrascale + far exceeds the value brought by traditional process node transplantation. The system level performance and power consumption are two to five times higher than that of 28nm devices. It also realizes far-leading system integration and intelligence, as well as the highest level of confidentiality and security.

The newly expanded Xilinx ultrascale + FPGA product portfolio includes Xilinx’s market-leading kinex ultrascale + FPGA, virtex ultrascale + FPGA and 3D IC series, while zynq ultrascale + series includes the industry’s first fully programmable MPSoC. With this product portfolio, Xilinx can meet the needs of various next-generation applications, including LTE advanced and early 5g wireless, TB level wired communication, automotive driver assistance system and industrial Internet of things (IOT) applications.

Ultrascale + FPGA and 3D IC

Xilinx selects the industry’s highest performance 16nm FinFET + technology and cooperates with TSMC, the world’s leading service foundry. TSMC is expected to launch more than 50 16nmff + streamers in 2015. With FinFET, the system level performance power consumption ratio of ultrascale + FPGA system can be increased by 2 times in terms of plane improvement alone.

Ultrascale + products can solve the biggest bottleneck problem in high-intensity processing tasks – memory interface problem. These new memory enhanced programmable devices include ultraram with a capacity of up to 432mb. Ultraram can provide the best system power consumption, flexibility and predictable performance, while replacing external memory, thus reducing the total cost of system bill of materials (BOM). Using ultraram can not only increase the system level performance power consumption ratio of typical design by at least 25%, but also significantly improve the performance of memory intensive design and significantly reduce power consumption and bill of materials (BOM) cost.

Xilinx has developed a tool based interconnection optimization technology smartconnect specifically for FPGA. This technology can automatically optimize the interconnection according to the throughput, delay and area requirements of specific design, and provide the best performance power consumption ratio, so as to solve the bottleneck of system level IP interconnection. Smartconnect can also intelligently connect different interface types and match appropriate interconnection schemes according to specific application requirements. This technology alone can improve the system level performance power consumption ratio and reduce the area by 20% to 30%.

The high-end ultrascale + series combines the combined power consumption advantages of 3D transistors and Xilinx’s third-generation 3D IC. Just as FinFET can achieve nonlinear improvement in performance power consumption ratio compared with planar transistors, 3D IC can also achieve nonlinear improvement in system integration and bandwidth power consumption ratio compared with single-chip devices.


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Zynq UltraScale+ MPSoC

Xilinx is launching another industry first technology in the field of heterogeneous MPSoC, which is the fully programmable ultrascale MPSoC architecture. Ultrascale MPSoC architecture can provide 32-bit to 64 bit processor scalability through virtualization support; The combination of soft and hard engines can realize real-time control, graphics / video processing, and combine waveform and packet processing with new generation interconnection and memory, advanced power management and other technical enhancements to achieve a variety of different levels of confidentiality, security and reliability. These new architectural elements, combined with vivado design suite and abstract design environment, can not only significantly simplify programming work, but also greatly improve productivity.

The new zynq ultrascale + MPSoC can not only realize unprecedented heterogeneous multiprocessing, but also “provide the right engine for the right task” by deploying all the above ultrascale + FPGA technologies. Compared with previous solutions, these new devices can improve the system level performance power consumption ratio by about 5 times. Located in the center of the processing subsystem is the 64 bit quad core arm cortex-a53 processor, which can realize hardware virtualization and asymmetric processing, and fully support arm TrustZone.

The processing subsystem also includes a dual core arm cortex-r5 real-time processor supporting deterministic operation, which can ensure real-time response, high throughput and low delay, and achieve the highest level of security and reliability. A separate security unit can realize military level security solutions, such as secure startup, key and library management and anti-corruption functions, which are the standard requirements of inter device communication and industrial Internet of things applications.

In order to realize comprehensive graphics acceleration and video compression / decompression functions, this new device integrates arm malitm-400mp special graphics processor and h.265 video codec unit, and also supports DisplayPort, Mipi d-phy and HDMI. Finally, the new device also adds a special platform and power management unit (PMU), which can support system monitoring, system management and dynamic power gating of each processing engine.


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