Although many people are still struggling with the lithography machine, the most difficult thing in China is not the lithography machine, but the EDA tool. The full name of EDA is electronic design automation, that is, electronic design automation, which refers to the use of computer-aided design (CAD) software to complete the functional design, synthesis, verification, and Physical design (including layout, wiring, layout, design rule inspection, etc.) and other processes.

In the 1970s and 1980s, designers relied on hand to complete the input, layout and wiring of circuit diagrams. Due to the low degree of circuit integration (hundreds to thousands of transistors) in this period, the transistor pattern (layout) was manually drawn on the coordinate paper, input to the pattern generator, and then the lithography plate was made in the way of “carving red film”.

Since the 1970s, with the development of complex semiconductors and communication technology, large-scale integrated circuits have been unable to meet the needs of the information society, and the research and development of integrated circuits have been gradually carried out. At this time, VLSI also began to emerge as the times require. The integration degree of VLSI has reached 6million transistors, and the line width has reached 0.3 μ M. Electronic equipment made of VLSI has small volume, light weight, low power consumption and high reliability.

With the application of VLSI, the programmable logic devices begin to mature. Through programming language design, verification of the circuit, and the use of tools to synthesize the underlying physical design, the IC design becomes more rapid and efficient.

So far, EDA tools have been indispensable tools for chip design. In short, hundreds of chips used in human society are designed through EDA. It is like kitchen utensils and ingredients, which can cook and bring out a variety of dishes. Without EDA tools, the entire chip industry is served by chips designed by EDA.

Without EDA, a series of chip manufacturers such as Qualcomm, Huawei and Apple will not be able to develop new chips and complete chip iterative upgrading.

However, EDA is not a tool, but a collection of dozens of tools. EDA tools are divided into three parts: front end (Verilog digital description and digital analog mixing); Back end (place & routing); Verification (DRC / LVS, etc.).

For example, to design the Kirin 9000, he must first formulate the chip specifications, just like the function list, including the specific functions and performance requirements that the chip needs to meet. In this way, R & D personnel can come up with design solutions and specific implementation architectures, and divide module functions.

Then the chip design engineer will generate the code by hardware description language, and then verify the correctness of the coding design by simulation. The verification standard is the specification formulated in the first step. See if the design accurately meets all the requirements in the specification. Specifications are the gold standard for correct design. Once the specifications are violated or not met, the design and coding need to be modified.

After the simulation verification is passed, the logic synthesis is carried out. After the synthesis is completed, the simulation verification is carried out again, and then the verification is carried out. At this time, when the gate level network meter power is obtained, the back-end design is carried out. Different EDA tools are required for each step, such as design compiler for clock tree synthesis, Astro layout and routing process, timing design software primetime, etc., so many people only pay attention to chip manufacturing, But I don’t know the importance of chip design. There are many high-end chips in China that can’t be designed through EDA, such as FPGA, ad digital to analog conversion, RF, etc.

So don’t think that Huawei just bought a shell for the arm architecture. The arm architecture is just a blank room. The fine decoration still depends on itself. The fine decoration is very difficult and requires a lot of funds and talents.

To some extent, EDA, like a tool in the hands of craftsmen, is the link between the chip design scheme and the semiconductor physical world. Without it, the connection with the raw material wafer factory will be cut off, and the chip will be impossible.

At present, cadence, Synopsys and mentor graphics have monopolized the global market. In terms of scale, Synopsys is currently the largest in the world, with a market share of 32.1% in 2018. Cadence is second only to Synopsys, with a market share of 22.0% in 2018 and mentor graphics’ share of about 10%.

The three EDA suppliers can provide a full set of chip design solutions, including a complete set of design tools such as analog, digital front-end (graphic editing, logic synthesis), back-end (layout), DFT (Design for testability), signoff, etc. Cadence’s strengths lie in analog simulation and layout design of analog and mixed signals. Synopsys’ strengths lie in logic synthesis, digital front-end, digital back-end and Pt signoff, while mentor’s strengths lie in calibre signoff and DFT, which are more distinctive in PCB design.

At present, China also has its own EDA manufacturers, namely, the three EDA giants of Huada Jiutian, Guangli micro and Xinhe technology.

Although it has been developed for more than 20 years, the EDA products of domestic EDA manufacturers are not complete, especially in the field of digital circuits. Our entire domestic EDA industry has obvious shortcomings in this field.

Secondly, because the domestic semiconductor industry has not formed a complete industrial chain, such as cadence, Synopsys and mentor graphics, which cooperate with wafer manufacturers in the new process development stage, they have a good understanding of the process, which in turn can better improve tools to support advanced processes.

However, China’s semiconductor industry is not perfect, and the entire semiconductor ecosystem is not mature. The combination of domestic EDA manufacturers and advanced processes is relatively weak. The reason why the combination of domestic EDA industry and advanced technology is not enough makes it more difficult to make breakthroughs in EDA research and development.

In addition, because EDA R & D is too difficult, there are only hundreds of EDA talents in China, which is not enough to support the R & D and breakthrough of EDA tools in China.

At present, the country is really vigorously developing the semiconductor industry and wants to build a perfect city’s semiconductor industry chain. This is a great opportunity for the development of China’s EDA tools. China’s EDA tools can take this opportunity to recruit more funds and talents, cooperate with upstream and downstream manufacturers, create their own complete EDA tool products, and compete with overseas markets!

Editor in charge: Tzh

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