CPLD and FPGA are devices we often use. Some say that FPGA is equipped with chips, but CPLD is not; Some say that more logic resources are FPGA and less CPLD; Some do not distinguish directly and call them FPGA. So what’s the difference between the two? Let’s take Altera’s CPLD and FPGA as an example to talk about the difference between them.
First, let’s take a look at the chip structure of CPLD and find out which parts CPLD is composed of.
CPLD is mainly composed of three parts: macro cell, PIA and IO control block. Each macro unit is directly connected with control signals such as gclk (global clock), OE (output enable) and gclr (clear), and the delay is the same. The macro units are also interconnected by fixed length metal wires, so as to ensure the fixed delay of logic circuit. The macro unit module is the logic function implementation unit of CPLD and the basic unit of the device. The logic circuit we designed is realized by the macro unit.
A macro unit is mainly composed of lab local array, product term select matrix and a programmable D trigger. Each intersection of the logic array can be turned on by programming to realize and logic, and the product term selection matrix can realize or logic. When these two parts work together, a complete combinatorial logic can be realized. The output can choose to pass through the D trigger or bypass the trigger. Through this structure, it can be found that CPLD is very suitable for realizing combinatorial logic, and can also realize certain timing logic with the later trigger.