NAND flash structure the internal organization of NAND flash is composed of blocks and pages. Each block contains multiple pages
For those cost sensitive projects, designers sometimes regard MLC NAND as an alternative, which has high capacity and low cost. However, MLC NAND has low durability (about 1 / 20 of SLC NAND), high bit error rate and can not work well in the extended temperature range. For some time, flash memory manufacturers have launched the third option, which is an enhanced MLC NAND product. These products have been sold under various names, such as enhanced MLC, ASLC, islc, supermlc, MLC +, turbo MLC and so on. These are what we call pslc NAND flash today, and have been greatly improved by storage manufacturers. It’s a bit confusing for ordinary users, because they don’t know the underlying technology. Do these products with different names have the same performance?
NAND flash Basics
NAND flash structure the internal organization of NAND flash is composed of blocks and pages. Each block contains multiple pages, depending on the device capacity; the typical number of pages per block is 64 to 256. Each page has a fixed size. The current MLC NAND has a page size of 8KB or 16kb, depending on the device capacity.
MLC NAND programming
Each unit in MLC NAND stores two bits of data from two different pages during programming. First, program the LSB, which will put the cell in the intermediate programming state. This programming step is called low page or fast page programming.
This programming step is quite fast, because the intermediate programming state does not need to be very precise, and the threshold voltage only needs to exceed the height that enables the sensing circuit to distinguish the erasure state. Next, program the MSB, which is called high page or slow page programming. This programming step is slow for two reasons. First, a read operation must be performed to find out whether the LSB is “0” or “1”. Then, in this programming step, the cell must be precisely placed in one of three possible states, which requires a programming algorithm to incrementally move the cell threshold in multi-channel.
In a word, compared with SLC NAND programming, LSB / MSB programming sequence results in slower writing in MLC. Fast page mode now we have seen the programming mode of MLC NAND. It is obviously feasible to simply store one bit of data without programming high page with MLC NAND. This programming method using MLC NAND is called “fast page mode”. In fact, some manufacturers have been promoting this product under different names, such as “turbocharging mode”, MLC +, etc. The advantage of fast page mode is that any MLC NAND can be implemented without any special instructions. It provides a simple way to improve the performance, but at the expense of the capacity of the device. The disadvantage is that compared with the real SLC NAND flash, the device durability is only slightly improved. This is because the threshold voltage of intermediate programming state is not as high as SLC NAND. Because of this, the error rate and data retention of fast page mode NAND are not better than standard MLC NAND. In pslc mode, the memory cell is also used to store the mode of single bit, but the programming threshold is increased by adding the twist technique. This is illustrated in the following figure
Pslc and fast page
There are many advantages in increasing the programming threshold voltage. It increases the sensing margin between programming state and erasing state, which improves the durability, lower error rate and longer data storage time. All of these are the results of improving the noise margin, which is attributed to the improvement of the programming threshold. The change of sensing threshold and higher programming threshold require each MLC NAND to have a special instruction. Therefore, unlike fast page mode, pslc mode can not be used on any MLC NAND, only in those places where MLC NAND is used, the supplier can provide special instructions.
Pslc mode and fast page mode
The following table summarizes the differences between pslc mode and fast page mode:
Pslc mode and 100% over configuration (OP)
Since pslc mode is half of the expected capacity for MLC NAND, there is a question: can a 100% over configured MLC NAND (that is, the physical capacity is twice the user capacity) achieve the same characteristics as pslc NAND? The answer is No.
100% OP NAND is still used in the standard MLC mode, so it does not have the performance improvement that pslc NAND has. In addition, as 100% OP NAND is only the standard MLC NAND, it has the same problems of high error rate and low data retention as the standard MLC NAND. For endurance, the durability of 100% OP NAND will be doubled compared with the standard MLC NAND, but the correct configuration of pslc NAND can achieve more than two times the durability of the standard MLC NAND.
The only scenario that 100% OP NAND is more durable than pslc NAND is that when writing small block data, pslc firmware uses flash block as the unit (instead of flash page). Under such conditions, small block data will greatly increase the operation of wear leveling function. Flash When the block is not full of data, it has to be iterated. The frequency of erase is very high, which may help it achieve higher endurance than pslc NAND. In all other cases, pslc NAND should have better durability.
Although most system designers hope to use SLC NAND products for their industrial embedded applications, the high cost of SLC NAND products is driving some designers to look for cheap alternatives. MLC NAND products can not meet the reliability and durability requirements of these industrial applications. Nowadays, many SSD masters add support for pslc mode in their firmware.
We have explained the technology behind pslc NAND, and its characteristics are between SLC NAND and standard MLC NAND. For system designers, they need a solution that is cheaper than SLC, but more reliable than MLC. Pslc will be a good choice.