Although TSMC has mass produced 7 nanometers, it will transition to 6 nanometers next year, and will reach 3 nanometer level in two to three years. However, after the semiconductor manufacturing process of memory enters 20 nanometers, the manufacturing becomes more and more difficult, and the cost-effectiveness ratio of the process is becoming lower and lower. The definition of process by memory chip manufacturers is not specific linewidth, but through two or three generations It is called 1xnm, 1ynm and 1znm. In general, 1xnm process is equivalent to 16-19nm level, 1ynm process is equivalent to 14-16nm level, and 1znm process is equivalent to 12-14nm level.
The roadmap of Meguiar’s DRAM technology shows that Meguiar will continue to expand multiple 10 nm nodes. In addition to the first generation of 10 nm (1 x) and the second generation of 10 nm (1 y), mass production of the third generation of 10 nm (1 z) has started. The first DRAM produced by using the 1znm process will be 16GB DDR4 and lpddr4x memories.
Next, Meguiar will expand three 10 nanometer scale nodes: 1 α, 1 β and 1 γ (note, the Greek alphabet)
At present, micron is expanding its second-generation 10 nm manufacturing process (i.e., 1y nm) for various products, including 12 GB lpddr4x and 16 GB DDR4 memory devices.
Meguiar’s next-generation 1z nm is about to enter mass production. The first DRAM to be produced using 1znm process will be 16GB DDR4 and lpddr4x memories. Then it is used to produce 16 GB lpddr5 memory devices and ddr5 memory devices.
After the 1z nm node, Meguiar plans to start using its 1 α nm manufacturing technology, followed by the 1 β nm manufacturing process, and then the verification of the feasible architecture of the 1 γ nm technology.
Source: Wu Chuanbin’s blog