The challenge of China's IC design industry is that there are not many IP suppliers and IP integration is difficult

ESA can provide a higher-level design platform, which can solve the problem of software development cost and speed

The design industry in mainland China has begun to advance to the 65nm process, and the scale is also expanding. The requirements for EDA tools also have "Chinese characteristics". Mentor Graphics Asia Pacific Technical Director Andrew Moore said at ICCAD 2010: "The requirements of China's design industry for EDA tools are: First, with the extensive use of CPU cores such as ARM and MIPS in SoC design, it is necessary to The co-design and verification of software and hardware requires hardware emulation accelerators. The second is physical verification tools, which used to be verified after placement and routing, but now the placement and routing and verification are carried out at the same time. Third, software development is becoming more and more important , it accounts for most of the cost of the development process, so there is a need to speed up software development and reduce software development costs.”

At the same time, although the IC design industry in mainland China continues to reach new heights, it still faces many invisible "barriers". "The challenge of China's IC design industry is that there are not many IP suppliers, resulting in Chinese local IC designers unable to find suitable IP or need to spend more time to integrate. The main reason is that the scale of China's semiconductor industry is not yet large. Very big, some IP companies have not entered the Chinese market." Andrew Moore mentioned. But he also added that as the scale of China's semiconductor industry continues to expand, some small and medium-sized IP companies will also enter the Chinese market, and this situation will not last long.

Solving the problems of software development cost and speed has become the common "life gate" of EDA suppliers. Therefore, Mentor's strategy is to "bet" ESA. Andrew Moore made a vivid analogy: "Just like in the PC industry, Windows can provide a better platform than the previous DOS system, and it is easy to develop and apply software on this platform, and ESA can also provide better IC design. A high-level platform. EDA tools mainly assist in designing hardware, and to execute embedded software on hardware, which requires ESA to support, the two can jointly serve the SoC design platform.”

In addition, IC design is constantly moving towards SoC, which involves the integration of IP from different sources. How should EDA suppliers "think what people think"? "EDA suppliers can solve the integration problem of IP from different sources from four aspects: the first is to do system-level design (ESL), the second is to improve the efficiency of functional verification, and the third is to realize software and hardware co-design, The fourth is to cooperate with the foundry for design for manufacturability (DFM)." Peng Qihuang, president of Mentor Graphics Asia Pacific, pointed out, "For EDA suppliers, they must have good solutions in these four aspects to help IC design firms solve design problems for large SoCs."

At the same time, low-power design has become an important part of IC design, and the problem of power consumption has become more prominent on the 65nm node, and will be more serious on the 40nm and 28nm nodes. "This requires two aspects of EDA verification and layout to solve the power consumption problem, and to achieve this goal, the most important thing is to establish standards." Peng Qihuang said.

As the technology continues to "fit" with Moore's Law, EDA suppliers need to "have both sides" in mature technology and advanced technology, and Fabless, EDA, and Foundry need to work closely together.

Responsible editor: tzh

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