When you draw the frequency response curve of the signal processing system, do you encounter any unexpected drop? You thought the frequency response would be smooth (at least it should be similar to the designed curve), but the result deviated from the target and let you down. If this is the case, then you are experiencing the sinc () frequency response problem. You’d say it’s clo sinc counter, but it could be something else. Let’s take a look at the specific situation.

This problem occurs at the input and output of the sampled data system. Let’s look at the output first. If you want the sampled data stream back to the analog system, you can connect the digital sample to the digital to analog converter (DAC). Now, most DAC ICs and modules have “hold” outputs, which means that when they receive a new digital sample, the output voltage will immediately change to the corresponding new value and remain unchanged until the next sample arrives. This behavior is so common that many engineers mistakenly believe that this is the specification. The output voltage of these DAC accurately represents the sampling stream (except for some high-frequency noise).

This is not the case“ The frequency response of this system is different from that of the system in which the output voltage is only displayed very briefly at each sampling time. This kind of peak output voltage is very inconvenient in practical application, so you rarely encounter this kind of situation.

Extending each sampling voltage to “fill the available space” forms an example of zero order hold. The output spectrum of this system is equal to the ideal peak output system multiplied by the spectrum of the rectangular pulse between two sampling points, that is, the width is equal to the sampling interval. The rectangular time response corresponds to the frequency response with sinc () characteristic. Sinc (x) is the abbreviation of sin (x) / X. there is Fourier image correspondence between the rectangle of one domain and sinc () of another domain, which can be seen everywhere not only in signal theory, but also in the whole field of physics.

Calculate the value of sinc function, that is, the value of variable x is equal to the ratio of signal frequency and sampling frequency multiplied by pi, which means that the value of sinc function is reduced by – 3dB when 0.444 times FS. Figure 1 shows the frequency effect of sinc () decline at 1 sample per second. Please note that there is a deep and narrow V-shaped notch at the position of the integer multiple of the sampling frequency.

Figure 1: sinc() zero order hold response with one sample per second.

Figure 2 shows the 0.444 Hz sine wave, which is sampled once per second. The peak value of sampling is obviously the peak value of input voltage. But because the sampling clock “goes” above the signal, the output voltage of some areas is relatively low for a long time.

Figure 2: 0.444hz sine wave sampling and holding, sampling once per second.

Our 0.444 Hz signal is still there, but the intensity is reduced because some of the energy goes into the higher frequency “spectrum”, as shown in Figure 3. You can see that the value of a single Fourier component of the input signal is 3dB higher than that of the component at 0.444hz of the output signal.

Figure 3: spectrum of waveform in Figure 2.

It should be remembered that sampling the peak to peak of a sine wave is not a good way to measure the energy contained in the fundamental frequency. When you increase the input frequency, more and more energy in the output signal resides in the higher frequency image components, which is often what we want to filter out from the clean output signal, so there is a decline problem.

Note that modern DACs for the audio market don’t have this problem. This is because this kind of DAC not only samples and updates the signal once a time, but also runs much faster inside the converter. The digital filtering technology can make the generated output look like it has not been sampled in the case of temporary check. It is very easy for audio DAC to achieve super smooth frequency response, so engineers often forget that the old sampling DAC does not have the property of such smooth response.

This explains the output part of the system. When we analyze the data in the digital field and before returning to the analog field, is it possible to detect that the input path will also cause a decline? Yes, sometimes. Let’s see under what circumstances the decline will be detected.

If you are using a sampling analog-to-digital converter (ADC), the answer is usually “don’t worry.”. The ADC takes a snapshot of the input signal during a short “gap” period. The notch period is usually much shorter than the sampling period, so it has little effect on the frequency response. However, if you use delta sigma ADC for industrial instrument applications, you may encounter a much more serious decline problem than bargaining in life（ Will people bargain for a drop? It’s just a metaphor

The reason why the frequency response of the delsig ADC decreases is that the average filter (used to smooth the fast pulse stream of the front-end modulator) simulates the pulse response of the fast pulse stream emitted by the zero order hold. In fact, at any given frequency, there may be two to four times the response reduction. This is because the filters used are usually at least two to four average filters in series. For the delsig ADCs used in the cypress psoc3 and psoc5 devices, the sampling filter of the ADC has four orders (covering most of the range), so the response is sinc ^ 4(). At any given signal frequency, there is a 4-fold decrease (in DB), as shown in Figure 1.

In other words, it’s – 12 dB at 0.443 times FS. This deviation from the frequency stable response will not affect the simple application of symmetric reclassification, but for most audio, communication and vibration measurement systems, it is very terrible, and the additional drop after providing the feedback signal to the DAC should also be considered.

But there are good aspects to this response. Figure 1 shows that the sinc () response only rebounds to about – 13.3 dB at about 1.43 times FS, which reminds us that a simple averager is not a good filtering method to eliminate high frequency variations. However, if you connect four in series and set it to sinc ^ 4 (), there will be a stopband response, only bouncing back to about – 53 dB, as shown in Figure 4. This is a very useful filtering method, usually in the case of not too much high-frequency interference in the time domain is enough to achieve precise measurement.

Figure 4: sinc ^ 4 () response of psoc3 ADC sampling filter.

So, when you need a smooth frequency response, how do you use the hold DAC, instrument delsig ADC alone or in combination? You should think that the solution proposed here is to use a filter, and the result will not disappoint you.

Editor in charge: GT