In the 1960s, with the emergence of T1 and E1, digital retimer began to attract attention. These systems carry multiple voice circuit channels on shielded twisted pair and need to install a digital retimer every few thousand feet. At that time, these devices were relatively advanced, and their technologies were similar to the current high-speed retimer, including equalization, clock data recovery (CDR), line coding and framing.

For every SerDes, there are always applications that require a longer connection distance. Typical applications of transfer driver or retimer chip include:

To the far end of a large PCB

Use additional connectors

Support daughter card

Connecting the expansion shelf

Using low-end PCB materials

Chips with shorter SerDes are allowed to support applications requiring longer SerDes

Enhance device functionality

Comparison between transfer driver and retimer

A typical data path of a transfer driver consists of a continuous time linear equalizer (CTLE), a variable gain amplifier (VGA) and a linear driver. CTLE is used to equalize the loss caused by frequency, VGA is used to recover the signal amplitude, and linear driver is used to drive the channel with suitable impedance.

The transfer driver usually provides input signal loss threshold and output receiver (Rx) detection function. At the same time, it also has a squelch detector, which can detect whether there is communication signal on low-speed channel.

Three main disadvantages of analog transfer driver

A CTLE is used to equalize the loss caused by frequency in the channel; One VGA for signal amplitude recovery; A linear driver drives the channel with the appropriate impedance.

Limitations of analog transfer driver

There are three main disadvantages of analog transfer driver

1. The adapter driver amplifies the signal and its internal noise. The transmitter sends high signal-to-noise ratio (SNR) signals through unreliable channels. Both the CTLE and the amplifier in the transfer driver have background noise. When the signal is amplified, these two kinds of background noise will be enhanced together with the signal. When the receiver recovers data, it has to contend with the amplified noise, which weakens the advantage of the transfer driver.

2. The transfer driver only removes part of ISI. The channel frequency dependent loss in the passband will interfere with bits in multiple bit times. CTLE can balance a part of ISI, but CTLE can never be configured accurately to completely correct all ISI, and the unbalanced passband ripple will leave ISI. Finally, the receiver has to contend with these residual Isis.

3. The transfer driver cannot recover the eye width and related jitter. It is very important for the receiver to have a good eye width to achieve error free. However, many factors can reduce the eye width, such as thermal noise, offset, analog offset, rise / fall time mismatch, terminal mismatch, ISI and power supply noise. The existence of the transfer driver further aggravates the adverse effects of these factors, making the signal recovery more challenging.

Therefore, the full link length before and after the transfer driver cannot be utilized, and a shorter routing must be used at each location to minimize the impact of additional noise, residual ISI and narrow eye width. Due to these problems, in all possible applications, system developers will be under great pressure to understand and characterize the complex impact of the adapter driver on the final system.

How does the retimer work

A typical retimer is a mixed signal analog / digital device, which has the ability of protocol awareness. It can extract the embedded clock, recover the data completely, and retransmit the new data copy with a clean clock. The transfer driver includes CTLE, VGA and driver stage, while the retimer includes CDR circuit, long tail equalizer (LTE) and decision feedback equalizer (DFE).

LTE is used to compensate for the damage of long-term impulse response, while DFE is used as a nonlinear equalizer to suppress ISI caused by channel defects such as high frequency loss and notch.

In addition, the internal digital logic, state machine and / or microcontroller are used to manage the automatic adaptation of CTLE, VGA, LTE and DFE blocks, and realize the protocol link training and state update.

The transfer driver includes CTLE, VGA and driver stage, and the typical retimer includes CDR circuit, LTE and DFE.

In short, the transfer driver only amplifies the signal, while the retimer can fully recover the data and send a new copy of the data. It shows how the attenuated eye opening is enhanced by the transit driver and how it is completely regenerated by the retimer.

In order to regenerate the signal, the retimer must have the ability of protocol awareness. It monitors link configuration transactions and sets itself to the correct mode. In some cases, the retimer will also participate in the link setting. Because of these automatic steps, there is no need to manually adjust the specific channel, cable and waveform factor, and the system integration at a higher data rate becomes easier.

Retimer conforming to high speed interface specification

Recently, the industry has issued a series of high-speed SerDes specifications that are difficult to implement, including USB4, pcie5.0, cei-28g and cei-56g specifications, as well as pci6.0 and cei-112g specifications that are still in the development stage. These new standards are designed to meet the increasing data throughput requirements.

Over the past 20 years, the optical interconnection Forum (OIF) and the IEEE802.3 Ethernet Committee have jointly issued the eighth generation SerDes and its previous specifications. For each generation of SerDes specification, suppliers have developed bit level retimer products compatible with multiple protocols, which promotes the product development of system manufacturers.

These SerDes technologies and the corresponding retimer have been adopted and produced a wide range of influence. Their application fields include telecommunications, Ethernet, Interlaken, RapidIO, serial advanced technology attachment (SATA), serial connection small computer system interface SAS, fibre channel, Infiniband, and many proprietary systems. But the transfer driver chip has never been widely used in OIF / Ethernet series ecosystem, because the design of the link is usually more refined, which depletes the link resources.

PCI Express is a high speed serial computer expansion bus standard. It is a standard motherboard interface for PC graphics card, hard disk drive, SSD, Wi Fi and Ethernet hardware connection. The transfer driver can fully meet the pcie3.0 specification, and the data rate can reach 8gbps / channel. The speed of pcie4.0 is doubled to 16gbps / channel, and the transfer driver also tries to meet its speed requirements, which brings benefits to the system implementers.

In May 2019, pci-sig Standard Organization officially released the pcie5.0 specification, and its data channel operation speed is up to 32gbps. With the increasing speed and the increasing demand for expansion capability, the development of PCI adapter driver seems to have come to an end. In the coming pcie6.0 standard, the weakness of pam4 makes designers abandon the use of adapter driver.

Let’s look at the universal serial bus (USB), which is the industry interface standard between computers, peripherals and other computers. Usb1.0 was released in 1996, followed by USB2.0 in 2000. Even if usb-if does not standardize the transfer driver, the advantages of the transfer driver in terms of extended connection and voltage compatibility still make it indispensable.

In 2010, with the release of USB3.0, the signal integrity problem of USB became more obvious, which promoted the launch of transfer drive products to expand the superspeed5gbps link connection. Usb3.1 and superspeed + 10Gbps links continue this trend. Usb3.2 extends the single channel mode of USB3.0 to dual channel through usb-c connector, which further promotes the application of transfer driver.

Usb-if officially released the USB4 specification in August 2019, which further improves the link performance to 20gbps / channel (40Gbps for dual channels). 20gbps signal is much more vulnerable than before, and is more vulnerable to ISI, passband ripple, jitter source, analog offset, terminal mismatch, internal offset, reflection, thermal noise and power noise. As a result, the era of USB application will come to an end.

The updated high-speed interconnection specification will promote the development of new generation signal conditioning solutions. Digital retimer is a key factor to transmit ultra-high speed data over challenging channels while maintaining signal integrity. When the speed is higher than 10Gbps, the use of transfer driver will face many difficulties. Therefore, the industry expects to promote the use of retimer and write it into the latest specification.

In summary, signal conditioning techniques such as transfer drivers and retimers are very useful in many system environments. But when the data rate exceeds 10Gbps, the transfer driver is no longer suitable for many applications. In OIF / Ethernet ecosystem, retimer has become the preferred signal conditioner. In the PCI e ecosystem, pci4.0 is the last move to transfer the driver, and retimer can provide a better solution. In the USB ecosystem, USB4 is a turning point, and the transfer drive is not the best choice for the system; The protocol aware retimer achieves the required signal integrity, provides a robust and clear development path and a low-cost system solution, which can fully meet the needs of consumers.

Editor in charge: PJ

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