Under the same semiconductor process, the number and density of transistor integration is one of the key indicators to determine the performance of a chip. For example, AMD’s newly released 64 core second-generation Xiaolong processor has integrated up to 32 billion transistors. However, in front of this newly released chip, AMD’s 64 core can only be defeated.
Xilinx announced the launch of the world’s largest FPGA chip “virtex ultrascale + vu19p”, with up to 35 billion transistors and the largest density among similar products. Compared with the previous generation virtex ultrascale vu440, it increased by 1.6 times and reduced power consumption by 60%. Although the specific area has not been announced, which is not the same order of magnitude as the world’s largest chip dedicated to AI computing with 1.2 trillion transistors, 46225 square millimeters, it is definitely a super behemoth in the FPGA world. From the official figure, it can cover the mouth of a mug.
In contrast, the second generation Xiaolong of AMD 64 core has 32 billion transistors, and the NVIDIA gv100 core has 21.1 billion transistors.
Vu19p FPGA is manufactured by TSMC 16nm process (20nm in the previous generation). Based on ARM architecture, it integrates 16 cortex-a9 CPU cores, 8.938 million system logic units, 2072 user I / O interfaces, 224mb (28mb) memory, DDR4 memory bandwidth up to 1.5tbps (192gb / s), 80 28g transceivers bandwidth up to 4.5tbps (576gb / s), and supports PCIe 3.0 x16, PCIe 4.0 X8 and ccix.
The chip is packaged in lidless, which optimizes heat dissipation and allows designers to give full play to the ultimate performance. This is a “chip maker’s chip” (chip of chip manufacturer), which is mainly oriented to the simulation and prototype design of the top ASIC and SOC chips, as well as the application fields of testing, measurement, computing, network, aviation, national defense and so on.