The objective of this experiment is to study the working principle of enhanced mode NMOS crystal tube as current mirror.
Theoretically, the working principle of n-type n-type metal oxide semiconductor (NMOS) current mirror is the same as that of bipolar junction transistor (BJT) current mirror analyzed in our student zone article in August 2020. Two identical transistors with the same gate source voltage (VGS) will have the same drain current ID. The current in the second transistor M2 is actually a mirror image of the current in the first transistor M1. Remember that the drain current of MOS transistor has the following relationship with the gate source voltage:
Where, K= μ nCox/2， λ It can be considered as a constant related to process technology.
By definition, the same transistor has the same w / L and process technical constant. In a simple current mirror, the two transistors have the same VGS. Therefore, both transistors will have the same ID. Since there is no current flowing in, the gate terminal iin of the FET = IOUT。
● Adalm2000 active learning module
● Solderless bread board
● Two 1 K Ω resistors (the resistance value is as close as possible or measured to three digits or higher)
● Two small signal NMOS transistors (ZVN2110A or cd4007 NMOS array)
● A dual channel operational amplifier, such as adtl082
● Two 4.7 μ F decoupling capacitor
A good way to measure the characteristics of current mirror is shown in Figure 1. The input resistance R1 and the output resistance R2 are now 1 K Ω. Be sure to accurately measure the actual values of R1 and R2 to ensure that the input and output current measurement results of the current mirror are accurate. Iin is equal to the W2 output voltage at W1 divided by R1. IOUT is equal to the voltage measured by oscilloscope channel 2 divided by R2. The diode connected M1 is connected across the gate and source terminals of M2.
In the current mirror configuration, the operational amplifier, as the virtual ground of the current mirror input node, converts the voltage step from W2 to the current step through a 1 K Ω resistor.
Figure 1. NMOS current mirror test circuit.
Figure 2. Simplified test configuration.
Load the starstep.csv file for the W2 channel of the signal generator, set the amplitude to 3 V P-P and the offset to 1.5 v. The VDS of the output device M2 is differential measured by oscilloscope input 1 + and oscilloscope input 1 -. The output current of the current mirror is measured by oscilloscope input 2 + and oscilloscope input 2 – at both ends of 1 K Ω resistor R2. The drain voltage is scanned using a triangular waveform with a frequency of 40 Hz from AWG 1 (output W1). If you want to use an operational amplifier setting, make sure that the device is properly connected to the power supplies VP (5 V) and VN (– 5 V).
Figure 3. NMOS current mirror test circuit board connection.
Figure 4. Simplified test configuration bread board connection.
Configure the oscilloscope to capture input and output signals of multiple cycles. If you are using an operational amplifier configuration, make sure the power is turned on.
Use the oscilloscope provided by scoty tool or through LTSpice ® The two waveforms are simulated and drawn. Examples are shown in figures 5 and 6.
Figure 5. Current mirror waveform in scoty plot, W2 is 10 kHz frequency.
Now change the frequency of W1 to 200 Hz and draw two waveforms. An example of using LTSpice simulation for the same circuit is shown in Figure 6.
Figure 6. Current mirror waveform in LTSpice plot, W1 is 200 Hz, W2 is 40 Hz.
In this experiment, we analyze the current mirror using NMOS transistor through experiment and simulation, and show the use of adalm2000 and scoty applications in building real circuits.