1. Performance and characteristics of pdiusbdl2 chip

The pdiusbdl2 interface chip produced by Philps company is a high-performance USB interface chip with integrated SIE, FIFO memory, transmitter and voltage regulator, and also supports DMA logic transmission. It is usually used in the system based on the microcontroller, and can communicate with the microprocessor in the system through the high-speed parallel interface. The highest parallel interface speed can reach 2Mb / s. It is a storage and data exchange device with 8-bit data bus and an address.

The functional block diagram of pdiusbdl2 chip is shown in Figure 1. He uses 28pin pin mode, with S028 and tssop28 encapsulation, and Sie is used to realize the complete function of USB protocol layer. The specific functions are as follows: synchronous mode identification, parallel / serial conversion, bit filling / de filling, CRC check / generation, PID confirmation / generation, address identification and handshake signal identification / generation, batch data transmission up to 1 MB / s, 3 ± 0.3V bipolar input range, 4.5-5.5v working voltage acceptable, industrial standard working environment temperature range of 40 to + 85 ℃. In other words, the chip can be used to complete the conversion of the signal sent by the microcontroller to the signal of the symbol USB specification.

The performance characteristics of interface chip pdiusbdl2 and the design of USB interface

2. USB working circuit

Compared with other traditional interfaces, USB’s fast data transfer capability and simple installation balance are particularly prominent in scanners. The traditional scanner with SCSI interface is very troublesome to install, and it is very demanding to the computer. It must have SCSI interface, and the parallel interface is too slow to transmit data. USB interface can meet the user’s requirements from two aspects of speed and ease of installation. Now the mainstream scanner manufacturers are producing USB interface scanners, such as HP, Acer, Targa and other companies are launching, this style of machine has the following advantages:

(1) USB interface can effectively improve the data transmission speed.

(2) No external power supply design, CIS technology, power consumption is only 2W, portable and reliable.

(3) It adopts ultra-thin and ultra light design, with a pleasing appearance.

2.1 design of hardware circuit

Using pdiusbdl2 integrated circuit to realize USB interface allows designers to choose a suitable product from a variety of microcontrollers on the market. This flexibility can reduce development costs by using the existing architecture, but also shorten the development cycle.

Figure 2 shows a schematic diagram of the interconnection of a 80C51 microcontroller and pdiusbdl2 integrated circuit. Because 80C51 is a kind of microcontroller widely used, software developers develop a large number of software development platforms based on it. Most electronic engineers are familiar with the reasons. Therefore, the user can use the familiar microprocessor (80C51) to design the core program, that is to say, 80C51 is used to realize the required functions, and pdiusbdl2 is used to convert the data signal into the signal conforming to USB rules. In this way, not only the abundant software resources in 80C51 can be used, but also the plug and play, hot plug and other features of USB bus technology can be used, which can reduce the cost of developing equipment and shorten the time cycle of developing products.

Figure 3 shows the hardware system block diagram composed of pdiusbdl2 and one 80C51 microprocessor. It is a device that transforms a scanner conforming to the SCSI standard into a USB bus specification. The scheme achieves the realization of USB interface technology with the minimum modification of existing hardware.

2.2 data signal drive

USB uses a differential mode driver to transmit USB data signal to USB cable. In the low output state, the change range of the steady-state output of the driver must be Vol < 0.3V, and a 1.5k Ω load should be added to the 3.6V power supply; in the high output state, the change range of the steady-state output of the driver must make VHO > 2.8V. At this time, there is a 15K Ω load on the ground, and the output change amplitude between the differential mode high output state and the low output state must be well balanced Signal deviation is minimized. In addition, the swing rate control function on the driver is also required to minimize radiation noise and crosstalk. The driver output must support three state operation for two-way half duplex communication. At the same time, high impedance is also required to isolate the downstream devices that are in hot insertion operation or have been connected but the power supply is not connected from the port. Compared with the undamaged local reference, the driver must be able to withstand an o.5-3.8v voltage on the signal pin.

2.3 data signal reception

A differential mode input receiver must also be used to receive USB data signals. When two differential mode data inputs take the ground potential as the reference and are in the range of 0.8-2.5v, the sensitivity of the receiver is at least 200mV, which is called the common mode input voltage range. When the differential mode signal line is not in the common mode range, the correct data reception is also required. If there is no damage and the local ground potential is used as the potential reference, the steady-state level input voltage that the receiver can receive should be between one o.5-3.8v. In addition, for different receivers, each signal line must have one single ended receiver, so the receiver must have one at 0. 8-2.0v (TTL input) switch threshold voltage.

3. Main parameters of USB interface working circuit

3.1 data encoding / decoding

In the process of signal transmission, NRZI coding is applied to USB. In NRZI coding, “1” is represented by no level change, while “0” is represented by level change. Figure 4 shows a data stream and an equivalent NRZI code stream, where the high level represents the j state of the data line, and the figure represents the NRZI encoding process. A string of “0” will make the NRZI data jump in every bit cycle, while a string of “1” will make the data unchanged for a long time.

3.2 bit filling

In order to ensure that the signal has enough changes, when sending a packet data on USB, the transmission device needs to fill in the bit. As shown in Figure 5, before NRZI encoding on USB, one “0” should be inserted after every six “1” in the data stream to force one change into the NRZI data stream. In this way, at least every seven bit cycles, the receiver will receive one data change to ensure that the data and clock are locked each other. The receiver must decode the NRZI data, identify the fill bits and lose them. Bit filling sync mode starts and runs through the whole transmission process. The data “1” used to terminate the sync mode will be counted as the first data in a sequence. Bit filling is always enforced, with no exceptions. If the bit filling principle requires, even if the bit is the last bit before the end of packet (EOP) signal, a “0” bit will be inserted at the end.

3.3 data signal rate

The nominal value of full speed data rate is 12MB / s. The tolerance of data rate for full function equipment is ± 0.25%. In order to meet the needs of the accuracy of the frame time interval, the accuracy of the main controller must be better than ± 0.05%. For a low rate of 1.5mb/s, the allowable frequency tolerance is ± 1.5%. This error includes the inaccuracy caused by the following reasons: the accuracy of the initial frequency, the crystal capacitive load, increasing the voltage to the oscillator, temperature and aging. The jitter of low rate should be less than 10ns. This tolerance allows low-cost oscillators to be used in low rate devices.

4. Conclusion

In recent years, with the widespread application of a large number of personal computers and windows that support USB, the use of USB interface devices (portable and portable electronic products are increasing) has also developed with amazing description. This paper introduces the application of pdiusbdl2 in USB interface circuit. Therefore, for the majority of engineers and designers, USB is the preferred bus when designing peripheral interface.

Editor in charge: GT

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