The global storage chip market has maintained an upward trend in fluctuations. The market size has increased from US $54.6 billion in 2005 to US $122.9 billion in 2020, with a compound growth rate of 5.6%. IC insights predicts that the global storage chip market size will increase by 22% year-on-year in 2021 and more than US $200billion in 2023.

1、 Memory chip: modern information storage medium

1.1 semiconductor storage: mainstream storage media, with DRAM and NAND as its core components

Early information storage was mainly based on paper and magnetic media. The early information storage mainly depended on paper. In 1725, the French invented punch cards and punch paper tapes, which were the earliest forms of mechanized information storage. Magnetic tape came out in 1928, and the era of magnetic storage began. Then in 1932, the predecessor of hard disk drive, magnetic drum memory, came out, with a storage capacity of about 62.5 kilobytes. In 1936, the world’s first electronic digital computer was born. It uses vacuum diodes to process binary data and regenerative capacitor drum memory to store data, but it is huge. In 1946, the first random access digital memory was born, with a storage capacity of 4000 bytes. Due to its large size, it was later replaced by the hard disk drive (HDD) invented by IBM in 1956. Subsequently, in 1965, read-only optical disk memory (CD-ROM) was popularized.

Semiconductor storage technology has been developed for half a century. In 1966, dynamic random access memory (DRAM) came out, and the memory entered the semiconductor era. The earliest single die capacity was 1KB, and now it has reached 16GB and above. Until 1980, Toshiba invented flash memory. Since then, in the 1990s, USB, SD card and other flash applications have emerged. In 2008, 3D NAND technology sprouted, and it was officially put into commercial mass production in 2014. From this point of view, semiconductor memory has been developed for 55 years, among which DRAM has been developed for 55 years and flash has been developed for 40 years. Due to the huge difference between 2D NAND and 3D NAND technologies, in fact, 3D NAND has only a history of more than 10 years, and its technical maturity is far less than DRAM.

Semiconductor memory, also known as memory chip, is a memory device using semiconductor circuit as storage medium and used to store binary data. It is an important part of modern digital system. Semiconductor memory has the characteristics of small size and fast storage speed. It is widely used in server, PC, smart phone, automobile, Internet of things, mobile storage and other fields. According to different storage principles, semiconductor memory can be divided into random access memory (RAM) and read only memory (ROM):

(1) Random access memory (RAM). Internal memory that directly exchanges data with the CPU. It can be read and written at any time with high speed. After power failure, the stored data is lost. It is a volatile memory. RAM can be further divided into dynamic random access memory (DRAM) and static random access memory (SRAM). DRAM is used as memory, and its demand is much higher than SRAM. SRAM is fast but expensive, and is generally used as CPU cache.

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(2) Read only memory (ROM). A memory that can only read pre stored information. The stored data will not be lost after power failure. According to the programmable and erasable functions, ROM can be divided into prom, EPROM, OTPROM, EEPROM and flash. Flash is the current mainstream memory, which has the performance of electronic erasability and programmability. It can read data quickly and will not lose data in case of power failure. It is often used in combination with DRAM. Flash can be further divided into NAND flash and NOR Flash: NAND flash has fast writing and erasing speed, high storage density and large capacity, but it can not directly run the code on NAND flash. It is suitable for the storage of high-capacity data. The advantage of NOR flash is that it is executed in the chip – the code in NOR flash can be run directly without system RAM. The capacity is small, generally 1mb-2gb.

DRAM and NAND flash are the two most important types of memory chips. According to the market scale, DRAM accounts for about 53% of the memory market, and NAND flash accounts for about 45%, and their total shares reach 98%, which are the main components of the memory market.

1.2 development trend: DRAM focuses on process iteration and NAND focuses on 3D stacking

1.2.1 DRAM: developing towards high performance and low power consumption. 3D stacking, advanced technology and EUV are the future trends

The working principle of DRAM is to use the amount of charge stored in the capacitor memory to represent a binary bit. It has the characteristics of fast operation speed and data loss after power failure. It is often used in the running memory of system hardware, mainly used in servers, PCs and mobile phones. In terms of structure upgrade, DRAM is divided into synchronous and asynchronous. The difference between them is that the read / write clock is different from the CPU clock. The traditional DRAM is asynchronous DRAM, which has been eliminated. SDRAM (synchronous DRAM) is an upgrade of DRAM. The read / write clock is strictly synchronized with the CPU clock, mainly including DDR, lpddr, gddr, HBM, etc

(1) DDR SDRAM (double data rate SDRAM) can read and write data twice in one clock, doubling the transmission data. At present, it has developed to the fifth generation. Each generation of upgrade is accompanied by the increase of transmission speed and the decrease of working voltage. According to yole’s prediction, with the launch of ddr5, the market will rapidly upgrade its products. It is estimated that the share of ddr5 will be close to 80% in 2025.

(2) Lpddr (low power DDR, low power dual channel synchronous dynamic random access memory) reduces the volume and power consumption by being adjacent to the processor (welded on the motherboard rather than inserted or stacked directly above the processor with the package stacking technology), reducing the channel width and other methods that sacrifice part of the reaction time. Lpddr memory is mostly used in smartphones, notebooks and new energy vehicles, while DDR memory is mostly used in servers, desktops and ordinary notebooks.

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(3) Gddr (graphics DDR) is a high-performance DDR memory specially designed for high-end graphics cards. Gddr and general DDR cannot be shared. The clock frequency is higher and the calorific value is smaller. It is generally used for E-sports terminals and workstations.

High performance and low power consumption are the two main trends of performance upgrading. Generally speaking, the data transmission speed of DRAM for drawing is higher than that of DRAM for computer, and that of DRAM for computer is higher than that of DRAM for mobile phone. In recent years, the rapid update and iteration of various drams, high performance and low power consumption are the two main trends. At present, DDR, lpddr and gddr have developed to the 5th to 6th generation, which greatly improves the transmission rate and greatly reduces the power consumption compared with the previous generation. In terms of mobile DRAM, lddr5 has been mass produced in the industry; DRAM for computer has evolved to ddr5; In terms of DRAM for drawing, the latest generation of gddr6 has been commercially available for several years.

The evolution from 2D architecture to 3D architecture may be one of the technical trends of DRAM in the future. 2D DRAM memory cell array and memory logic circuit occupy two sides. 3D DRAM stacks the memory cell array above the memory logic circuit, so the bare crystal size will become smaller, and the bare crystal output of each wafer will be more, which means that 3D DRAM has an advantage in cost.

The typical product of DRAM evolving from 2D architecture to 3D architecture is HBM. HBM (high bandwidth memory) is a high-performance DRAM based on 3D stack technology introduced by AMD and SK Hynix. It is suitable for applications with high memory bandwidth requirements, such as graphics processors, network switching and forwarding devices (switches, routers). Both HBM and gddr are closely integrated with GPU, but HBM is not located next to GPU, but on the intermediary layer connecting GPU and logic circuit. These DRAM chips have a large number of silicon through holes (TSVs), which connect the chips in HBM and the logic chips at the bottom. Therefore, DRAM particles can be stacked with each other, so that the chip can achieve small area and high capacity in the vertical plane.

DRAM process evolves to 10+nm and will continue to approach 10nm. The manufacturing process of DRAM is close to 10nm, and all manufacturers are in the 10nm+ stage. The industry names the first three generation 10nm+ processes of dram as 1x (16-19nm), 1y (14-16nm) and 1z (12-14nm). Industry leaders Samsung Electronics, SK Hynix and micron entered the 1x nm stage from 2016 to 2017, the 1y nm stage from 2018 to 2019, and the 1z nm stage after 2020. Latest 1 α Nm is still at the stage of 10+nm. Samsung took the lead in completing the technology development in march2020, followed by micron and Hynix. Major manufacturers will continue to approach 10nm.

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Photolithography technology changes from DUV to EUV. At present, the most mature lithography technology used by DRAM is the 193nm DUV lithography machine. The EUV lithography machine uses 13.5nm wavelength, which can further reduce the cost and improve the accuracy and productivity by reducing the number of masks. After the process reaches 14nm, the economy of using EUV begins to show, while DUV needs to use multiple exposure (saqp) technology to form a circuit with thinner line width, so it is at a disadvantage in cost. At present, DRAM manufacturers can still use DUV to produce 10+nm DRAM through process improvement. It is inevitable that DRAM production will turn to EUV in the future. Samsung and SK Hynix introduced EUV technology to manufacture DRAM in 2020 and 2021 respectively. Micron expects to produce EUV based DRAM in 2024. At present, the economic benefit of EUV is lower than that of DUV, but EUV will bring a more simplified process, and the cost will be continuously reduced with the improvement of the process.

1.2.2 NAND: 3D NAND has a short commercial time, and high-density storage and 3D stacking are the future trends

In the 1980s, 2D NAND technology was born and commercialized, and the flash memory industry achieved rapid development. In 1967, dawonhng and Simon s jointly invented the floating gate MOSFET, which is the basis of all flash memory, EEPROM and EPROM. In 1984, Fujio MASUOKA, the father of flash memory, formally introduced flash memory on behalf of Toshiba at the IEEE 1984 integrated electronic equipment conference. In 1986, Intel introduced the flash card concept and established the SSD department. In 1987, MASUOKA invented 2D NAND. Since then, Intel, Samsung Electronics and Toshiba have successively launched 2D NAND products. In the early 1990s, the flash memory market expanded rapidly. In 1991, the output value was only US $170million, and in 1995, it reached US $1.8 billion, with a compound growth rate of 80%. In 2001, Toshiba and SanDisk announced the launch of 1GB MLC NAND. In 2004, based on the same density, the price of NAND fell below DRAM for the first time, and the cost effect brought flash memory into the computing field.

3D NAND began commercial mass production in 2014, and mainstream manufacturers basically realized product conversion. In 2007, Toshiba first launched the BICS type 3D NAND. In 2013, Samsung launched the first generation of v-nand 3D NAND. In 2014, SanDisk and Toshiba announced the launch of 3D NAND production equipment. Samsung took the lead in selling 32-layer MLC 3D v-nand. Thus, the 3D NAND market began to expand rapidly.

3D NAND storage units evolve to TLC, QLC and other high-density storage. NAND flash can be divided into SLC, MLC, TLC, QLC, etc. according to the density of storage units. One storage unit can store 1, 2, 3 and 4bit data respectively. The higher the density of the storage unit, the shorter the life and the slower the speed, but the larger the capacity and the lower the cost. Currently, NAND flash is dominated by TLC, and the proportion of QLC is gradually increasing.

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3D stacking greatly improves the capacity, and the service life is longer than that of 2D structure under the same cell density. 3D NAND is a revolutionary new technology. Firstly, it reconstructs the structure of storage units and stacks them. The changes brought about by 3D NAND include: (1) the overall capacity is greatly increased; (2) Capacity per unit area increased. For chips with specific capacity, the process required for 3D NAND is much lower than that of 2D NAND (larger linewidth), so it can effectively suppress interference, save more power, and enhance stability. For example, the life of 3D NAND of TLC is longer than that of 2D NAND.

The process evolution is relatively slow, and the number of 3D stacking layers increases rapidly. From 2014 to 2020, the number of 3D NAND stack layers of each manufacturer increased from 32 layers to 128 layers, roughly doubling in three years, while the process process reached 19nm during the 2D NAND period, and the process of converting to 3D NAND process fell back to 20-40nm, and then gradually evolved to a higher process, which was slower than the logic chip. According to the technical blueprints of various manufacturers, the number of stacking layers of NAND flash is expected to reach 2XX in 2022, while the process may stay around 20- 19nm.

There is still much room for improvement in the number of stacking layers. According to the prediction of SK Hynix, 3D NAND will encounter a bottleneck when it reaches the stage when the number of layers exceeds 600. At present, the mainstream products in the market are lower than 200 layers, and there is a large space for technology upgrading in the future.

Mainstream manufacturers have basically realized the product conversion from 2D NAND to 3D NAND, and Samsung Electronics is 1-2 years ahead. Starting from the mass production of 3D NAND in 2014, major NAND manufacturers have basically completed the product conversion from 2D to 3D by 2018. In 2018, the proportion of 3D NAND production of original NAND flash manufacturers such as Samsung Electronics, Toshiba / Western Digital, micron, Intel has exceeded 80%, and micron has even reached 90%. At present, each manufacturer has achieved mass production of 128 floors (112 floors for Kaixia and Western Digital), 176 floors are becoming the mainstream, and R & D and mass production above 2XX floors are advancing. Among them, Samsung has the most advanced R & D progress, 1-2 years ahead of other manufacturers.

1.3 emerging technologies: the market application is limited and cannot constitute a substantial substitute

Besides DRAM and NAND flash, nor flash has attracted more and more attention in recent years.

The NOR flash process is restarted iteratively and pushed towards the 55/40nm node. In 1988, Intel launched the first commercial nor flash product with a process of 1.5um. In 2005, Intel launched a 65nm product. However, due to the shrinking market, the NOR flash process has been stagnant for a long time. However, in recent years, with the growth of demand for wearable devices, amoled/tddi and automotive electronics, the NOR flash industry has recovered its growth since 2016. At present, the mainstream process of high-density nor flash products is advancing from 65nm nodes to 55nm/40nm nodes, while low-density nor flash products are still manufactured at 65nm and above nodes.

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SPI interface nor flash is the mainstream, which has the advantages of small size, low power consumption, low cost and high speed. NOR flash mainly has two transmission interfaces: SPI (serial peripheral interface) and I2C (parallel access interface). Compared with I2C, SPI only needs 6 signals to realize the communication between controller and memory, which reduces the design complexity, reduces the circuit board area, and reduces the power consumption and total system cost. The transmission speed of SPI is generally tens of Mbps, while that of I2C is generally 400kbps. NOR flash using SPI technology is generally called SPI nor flash, while those using I2C are called parallel nor flash. At present, there are many nor flash manufacturers in China, and both nor flash with two interfaces are developed and produced.

The application of emerging storage technologies is limited, and the market share is expected to remain at a low level for a long time. According to yole, at present, the market share of other storage technologies except DRAM, NAND flash and NOR flash in the market is only 2%. It is expected that by 2026, the share of emerging storage technologies, including PCM, MRAM and ReRAM, will still be less than 3% of the whole market.

SRAM, EPROM and EEPROM are basically replaced or applied to more limited scenarios.

(1) SRAM is expensive for CPU caching. Compared with DRAM, SRAM is fast and low power consumption, but the cost is high. Due to the complex internal structure and large area occupied by SRAM, the cost is high, and it is not suitable for high-density storage. Generally, SRAM with small capacity is used as the cache between high-speed CPU and low-speed DRAM.

(2) EPROM has been replaced. The information stored in EPROM can be maintained when power is off, and can be erased by strong ultraviolet radiation. It is a rewritable memory chip. EPROM was replaced after the introduction of flash.

(3) EEPROM is used for small capacity information storage of module chips. EEPROM, like EPROM, is read-only and can erase information very quickly. Compared with flash, EEPROM has low storage density and high cost. Generally, EEPROM is used to meet the data storage requirements of module chips, such as camera module storing lens and image correction parameters, LCD panel storing parameters and configuration files, Bluetooth module storing control parameters, memory module temperature sensor storing temperature parameters, etc.

The development direction of new storage is to combine the read-write speed of DRAM with the nonvolatile nature of flash. At present, there is no alternative to DRAM and NAND flash. At present, there are four popular new types of storage: PCM, fram, MRAM and ReRAM:

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(1) PCRAM (phase change random access memory). It has the advantages of small process size, high storage density, fast read-write speed, low power consumption and strong scalability. However, PCM must be built layer by layer, and each layer must adopt key photolithography and etching steps, resulting in an increase in the proportion of cost and layer number, so it does not have economies of scale. At present, Intel, micron, Samsung and other manufacturers are distributed.

(2) Fram (ferroelectric memory). It can realize ultra-low power consumption and fast storage, and is expected to be applied in small consumer devices, such as mobile phones, power meters, smart cards and security systems. However, due to the low storage density of FRAM and the limited access times due to the inherent shortcomings of ferroelectric crystals, fram is no longer nonvolatile beyond the limit, so fram cannot replace flash. At present, Fujitsu, Deyi, cypress, etc. are the manufacturers in the layout.

(3) MRAM (non-volatile magnetic random access memory). With the high-speed read-write capability of SRAM and the high integration of DRAM, it can be written repeatedly for unlimited times, which is expensive, complex and difficult to design. The manufacturers of the layout include Samsung Electronics, IBM, NXP, etc.

(4) ReRAM (resistive random access memory). Compared with flash memory, it has the advantages of lower read latency and faster write speed. However, ReRAM technology is very difficult in physics, and its performance and reliability are not competitive. At present, the manufacturers under research include Panasonic, TSMC, liandian, etc. (report source: future think tank)

2、 Supply and demand analysis: high growth and strong cycle coexist

2.1 demand side: stored as a long-term high growth track, driven by data center, AI and autopilot

Memory chip is a long-term high growth track. As long as there is data, it cannot be separated from storage. The birth and explosion of new terminals or applications drive the growing demand for data storage. In the past, there have been many growth cycles driven by new terminals or applications in the memory market, such as the penetration of PCs in the 1990s, the penetration of functional computers and the launch of iPods in the 2000s, and the penetration of intelligent computers and the explosion of cloud computing in the 2010s. In the future, memory demand will enter the next growth cycle driven by 5g, AI and automobile intelligence.

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The scale of the memory chip market maintained long-term growth, and its share in the semiconductor market fluctuated upward. The global storage chip market has maintained an upward trend in fluctuations. The market size has increased from US $54.6 billion in 2005 to US $122.9 billion in 2020, with a compound growth rate of 5.6%. IC insights predicts that the global storage chip market size will increase by 22% year-on-year in 2021 and more than US $200billion in 2023. The proportion of memory chips in the whole semiconductor industry was more than 10% in 2002, and reached 33.1% in 2018, the highest point in the last round. The overall situation is fluctuating upward. In 2019 and 2020, due to the downward movement of the storage cycle, the proportion decreased. According to WSTS, the proportion was about 27% in 2020.

Structurally, DRAM and NAND flash are the core categories of memory chips. According to IDC, DRAM and NAND flash have occupied most of the memory chip market since 2005, accounting for 75% in total. In 2020, the share will rise to 96%.

Driven by downstream demand for 5g mobile phones, servers, PCs, etc., the storage chip market will expand rapidly. In 2020, in DRAM downstream market, computing, wireless communication, consumption and industry accounted for 45.9%, 36.5%, 9.6% and 4.5% respectively, while in NAND flash downstream market, computing, wireless communication, consumption and industry accounted for 54.8%, 34.1%, 6.1% and 2.6% respectively (Note: in IDC classification, “computing” includes servers and PCs, and “wireless communication” includes smartphones). The 5g upgrade of smart phones has led to an increase in the capacity of single smart phones, the development of cloud computing and AI, and the continuous rise in storage demand. In addition, since 2020, due to the changes in work and lifestyle brought about by the COVID-19, many applications of remote services continue to drive the demand for servers, while the shipments of tablets and laptops have also increased significantly due to the demand for remote office and teaching. The development of downstream market will drive the rapid development of DRAM and NAND flash.

From the change trend of application structure, servers and smart phones have become the main driving forces for the growth of storage demand in the past 10 years. (1) Smart phones: with the outbreak of smart phones in 2010, the demand for memory chips exploded, and the proportion of smart phones in DRAM downstream applications began to rise rapidly. The scale of mobile phone DRAM market increased from US $2.1 billion in 2005 to US $23.9 billion in 2020, with a compound growth rate of 17.8%. The scale of mobile phone NAND market increased from US $7billion in 2005 to US $18.9 billion in 2020, with a compound growth rate of 6.8%. (2) Computing (server and PC): the computing market grew steadily. The sales of DRAM for computing continued to grow. The sales increased from $23.3 billion in 2005 to $30billion in 2020, with a compound growth rate of 1.7%. The low growth rate was due to the decline of the PC market since 2010. However, the proportion of computing in NAND flash downstream applications began to rise rapidly. The sales volume increased from $8.4 billion in 2005 to $30.4 billion in 2020, with a compound growth rate of 8.9%.

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2.1.1 server: the capital expenditure of cloud services has increased rapidly, and the server platform has been upgraded

Server shipments grew steadily. According to IDC statistics, from 2016 to 2020, driven by the wave of cloud computing, AI, enterprise digital transformation and the Internet of things, the global server shipment increased from 9.56 million to 12.24 million, with a compound growth rate of 6.4%.

The capital expenditure of cloud service manufacturers maintained a high growth rate, and the growth momentum of server shipments was strong. Under the action of short-term driving forces (housing economy) and long-term driving forces (AI and Cloud Computing), global cloud service manufacturers have accelerated the purchase of servers. 20q1-21q2 servers have gone through replenishment before de stocking. Since 21q3, the demand for servers has recovered. In the short term, the demand for servers has stabilized, while the capital expenditure of global cloud service manufacturers has maintained a high growth of around 40%. We judge that the demand for servers has strong support. In the long run, the rapid development of 5g, cloud computing wave, AI, enterprise digital transformation, Internet of things and so on will promote enterprises to purchase more servers. IDC expects to maintain a steady growth from 2021 to 2025. The shipment volume will reach 12.99 million units in 2021 and 16.76 million units in 2025, with a compound growth rate of 6.5%.

The upgrade of the server platform will lead to the capacity improvement and specification upgrade of the storage chip. The upgrading of the server has increased the carrying capacity of DRAM and NAND flash. According to the calculation of dramexchange, the average single DRAM capacity of the server has increased from 304gb in 2019 to 397gb in 2020, an increase of 30%. According to the calculation of chinaflashmarket, the average single machine capacity of NAND flash of the server will increase from 2300gb in 2019 to 2700gb in 2020, an increase of 17%. At present, the servers of Intel platform occupy a dominant position in the market. For example, its servers are switching from pure platform to Whitley platform. At the same time, the next generation Eagle stream platform will be available from 2022. The switching of server platforms will bring about an increase in the carrying capacity and specifications of DRAM and NAND flash, such as the memory channel from 6 to 8, and DRAM from DDR4 to ddr5.

2.1.2 smart phones: 5g fast penetration, single machine storage capacity increased

Smart phones have entered an era of stock upgrading, and the carrying capacity of a single memory chip has maintained a high growth. Smart phones experienced explosive growth from 2008 to 2016. The shipment reached a peak in 2016, and has declined in recent years. With the promotion of 5g replacement, the shipment of smart phones is expected to resume a small growth. The overall smart phone market belongs to the stock market. The average single machine capacity of its DRAM increased from 0.5gb in 2010 to 4.3GB in 2020, with a compound growth rate of 24%. The average single machine capacity of NAND flash increased from 21GB in 2014 to 108gb in 2020, with a compound growth rate of 31%.

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It is estimated that the global 5g penetration rate will be close to 70% in 2025, and 5g replacement will drive the increase of storage capacity. With 5g commercial deployment in more regions around the world and 5g models launched by various brands, the penetration of 5g smart phones has increased rapidly. According to IDC’s forecast, 5g smartphone shipments will account for more than 40% of global sales in 2021, and will increase to 69% in 2025. The domestic 5g penetration rate leads the world, reaching 81% in December 2021. The 5g mobile phone upgrade brings about the upgrade of storage capacity. According to the growing demand for high-definition video, high-pixel shooting, 5g transmission and cloud games from micron, the smart phone will be switched from 4G to 5g, the DRAM configuration of the flagship will be increased from 6gb+ to 8gb+, and the NAND configuration will be increased from 128/256gb to 256/512gb. The carrying capacity of the single memory chip of the smart phone continues to increase.

2.1.3 PC and tablet: the stock is upgraded, and the storage capacity is steadily increased

The global PC shipment in 2021 is close to the historical peak level, and the future shipment will remain stable. Driven by tele work and education, the global PC market reversed its decline in 2020, with a year-on-year increase of 13.5%. The epidemic is not a long-term event, and there is great uncertainty in the sustained and rapid growth of PC demand. IDC expects the global PC shipment to reach 345million units in 2021, with a year-on-year increase of 13.5%, close to the historical peak in 2011. It is expected that the shipment will remain at the level of 350million units by 2025. If tablet computers are taken into account, the global pc+ tablet shipment will reach 520million units in 2021, and will decrease slightly to 510million units by 2025. Therefore, from the perspective of shipment volume, pc+ tablets will be the stock market in the future, and the demand for storage chips will mainly come from the improvement of the carrying capacity of single machines.

In the future, the average capacity of PC DRAM and NAND flash will maintain rapid growth. With the continuous growth of data storage demand, PC storage configuration has been upgraded year by year. According to PC math research, PC DRAM capacity has continued to grow since 2000. By 2020, the single machine will be close to 10GB, and the change trend of NAND flash capacity is similar. According to yole’s prediction, the average DRAM capacity of PC will be about 10GB in 2020 and nearly 18gb in 2026, with a compound growth rate of about 10%. In 2020, the average NAND flash carrying capacity of PC will be about 450gb, and in 2026, the average NAND flash carrying capacity of PC will be higher than 1000gb, with a compound growth rate of about 15%.

2.1.4 automobile: high speed penetration of automatic driving, and high demand for single vehicle storage

The level of auto driving has been improved, and the demand for large capacity data storage has increased. Autonomous vehicle can reduce the necessity of human intervention for driving. Infineon expects that in 2020, the penetration rate of L1 and above new vehicles will be close to 50% and that of L2 will reach 7%. In the future, it will develop from the current L2 stage to L4 and L5 stages that do not need driver intervention at all. With the improvement of automatic driving level and the introduction of on-board information entertainment system (IVI), multi camera visual processing, long-life battery and ultra-high speed 5g network, the data flow inside and outside the vehicle has been greatly increased, and super large computing processing has become a necessity. Accordingly, the demand for large capacity data buffer (DRAM, SRAM), storage (NAND) and other storage (NOR flash, EEPROM, etc.) has increased significantly.

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Intelligent automobile drives the demand for data storage, and the on-board storage market is expected to grow at an accelerated rate. In 2020, the global on-board storage market was about US $4.6 billion, accounting for less than 5% of the overall storage market, but the growth rate was high. The compound growth rate from 2016 to 2020 was 11.4%. It is expected that with the improvement of automotive intelligence, the on-board storage market will accelerate its growth, mainly reflected in the rapid growth of demand for DRAM (especially lpddr for new energy vehicles) and NAND. In 2021, the on-board storage market will reach US $5.66 billion, It will increase to USD 11.94 billion in 2025, with a compound growth rate of 21.0% from 2021 to 2025. In terms of structure, the on-board storage market is dominated by DRAM and NAND, accounting for 57% and 23% respectively. Other sub categories of memory chips such as nor flash, SRAM and eprom/eeprom are also widely used in vehicles.

At present, the storage capacity of cars is equivalent to that of smart phones. At present, the demand for vehicle storage mainly comes from ADAS system and IVI system, in which ADAS accounts for more than 10% and IVI accounts for about 80%. According to China’s flash memory market, the current high-end models are equipped with 12gb DRAM and 256gb NAND at most, which is equivalent to the current flagship smart phones; In the mid-range models, 2~4gb DRAM and 32~64gb NAND flash are common configurations; Among low-end models, DRAM and NAND flash have lower capacity requirements, only 1~2gb and 8~32gb.

The capacity of DRAM and NAND flash of a single vehicle can be greatly improved. With the improvement of automatic driving level, there will be more and more sensors used to collect vehicle operation and surrounding environment data, including cameras, millimeter wave radars, laser radars, etc. OTA (over the air download technology), v2x (vehicle to everything) and other network communication functions will also generate a large amount of data. Intel estimates that autonomous vehicle will generate 4000GB of data per day. Even low-level autonomous vehicles need a lot of on-board data storage, because the cabin IVI system is gradually equipped with more large-size and high-resolution screens. According to the prediction of China’s flash memory market, L4 and L5 vehicles will be equipped with more than 40Gb DRAM and more than 3TB NAND flash, which is much higher than the current smart phones.

2.2 supply side: stable capacity expansion and continuous process iteration

The growth of memory chip bit supply comes from two aspects: (1) process iteration brings about bit growth in single wafer. (2) Expansion of wafer capacity.

(1) Process iteration:

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Leading manufacturers focus on process iteration to meet the rapidly growing bit (GB) demand. In terms of DRAM, according to sk Hynix, the DRAM process ranges from 1znm to 1 α Nm, the number of grains that can be cut out from a single wafer increases by 25%, which will still drive the growth of DRAM bit supply without the growth of wafer capacity. At present, Samsung Electronics, micron, SK Hynix and other DRAM products are introducing EUV lithography, and the process is changing from 1znm to 1 α Nm conversion to meet the demand of DRAM bit growth. In terms of NAND, the 3D stacking process continues to evolve, and layer 176 has gradually become the mainstream of 3D NAND. At present, the head manufacturers are promoting the R & D and mass production of 2XX layer 3D NAND, and it is expected to significantly increase the bit output of single wafer.

(2) Capacity expansion:

From 2021 to 2022, DRAM and NAND flash capacity increased steadily. We have counted the production capacity and forecast of major DRAM and NAND flash manufacturers. Five DRAM manufacturers are selected from Samsung Electronics, micron, SK Hynix, Nanya technology and Changxin storage, and seven NAND flash manufacturers are selected from Samsung Electronics, micron, SK Hynix, flash Alliance (Toshiba + western data), Intel, wanghong and Changjiang storage. Overall, in 2020, 2021 and 2022, DRAM capacity increased by 4.5%, 9.9% and 7.0% year-on-year to 5.31, 5.84 and 6.25 million chips / year respectively, and NAND flash capacity increased by 1.7%, 6.7% and 5.9% year-on-year to 6.88, 7.34 and 7.77 million chips / year respectively. In addition, some of the capacity that cannot be attributed to DRAM, NAND flash, nor flash and SRAM, the overall capacity of storage chips in 2020, 2021 and 2022 increased by 0.0% year-on-year respectively 7.6%, 5.6% to 12.58, 13.54, 14.29 million pieces / year, and the production capacity increased steadily.

The new storage capacity will be put into operation from 2021 to 2022. From the perspective of branch manufacturers, the second phase of Xi’an expansion of Samsung Electronics, mainly NAND flash, will be put into operation in mid-2021, while the new capacity of pingze P2 and P3 (DRAM, NAND flash and wafer foundry) will be put into operation in 2021 and 2022 respectively. The K2 and Fab7 capacity (NAND flash) of Kaixia / Western Digital will be put into operation in the spring of 2022. Sk Hynix and Meguiar’s DRAM expansion were put into production in Q1 2021 and the middle of the year respectively, while domestic Changxin storage and Changjiang storage have continued to have capacity in the past two years and the next two years, but it will take some time to climb the slope, and the impact of the actual capacity compared with the global capacity is limited. On the whole, the new capacity of large storage plants will be released mainly from 2021 to 2022. In 2021, there will be a lot of capacity investment. It is expected that there will still be capacity investment in 2022, but the growth rate will slow down.

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After 2023, there is no confirmed new capacity. After 2023, Samsung Electronics has no production expansion plan; Micron plans to invest about US $7billion in Hiroshima, Japan to expand DRAM production, and the new plant will be put into operation in 2024; Sk Hynix will invest US $106billion in Seoul, South Korea, to expand DRAM production in the next decade. The new plant will start construction in 21q4. All engineering projects will be completed in 2025, and then mass production will be started. From the perspective of the production expansion plan of each manufacturer, the newly added capacity of memory chips in 2023 and beyond is relatively small.

It is difficult for the process iteration to fully meet the bit growth demand. It is expected that the storage capacity will increase by 5~10% after 2023. According to sumco forecast, the compound growth rate of DRAM bit demand from 2021 to 2025 will reach 20%, of which 10% can be met by DRAM process iteration, and the remaining less than 10% growth rate still needs to rely on capacity expansion (that is, the compound growth rate of DRAM wafer supply still needs to reach 10%). The compound growth rate of 3D NAND bit demand from 2021 to 2025 will reach 31%, of which 30% growth rate can be met by 3D NAND process iteration. Due to the large growth of 3D NAND bit supply in recent two years, it is estimated that the growth rate of 3D NAND wafer supply from 2021 to 2023 will be 1% (the current production expansion rate exceeds the demand, resulting in excess supply), and the compound growth rate will return to 8% from 2023 to 2025. Therefore, we expect that after 2023, DRAM and 3D NAND capacity will still increase by 5~10%.

2.3 periodicity: the short-term price fluctuates periodically, and the long-term unit cost decreases

Memory chips have the property of bulk commodities, and the mismatch between supply and demand leads to periodic fluctuations in prices. There is a large downstream demand for memory chips, which requires scale expansion to maintain economic benefits. At the same time, most of the products are standardized products, so they have the attribute of bulk commodities. When the industry demand is strong and in the upward cycle, when a storage manufacturer chooses to expand its production to expand its market share, usually other manufacturers will follow the expansion, resulting in the centralized landing of production capacity, resulting in overcapacity, and ultimately the decline in the price of storage chips. When the industry demand is sluggish and in a downward cycle, due to the opposite reasons, the market supply will eventually be less than demand, and the price of memory chips will gradually rise, thus forming a certain periodicity. DRAM and NAND industries have formed a monopoly pattern, especially DRAM. Therefore, the production expansion and pricing strategies of each company are similar, and the capital expenditure is relatively concentrated, making the periodicity of memory chips significantly stronger than that of other semiconductor categories. Take Meguiar and SK Hynix as examples. Within 1-3 years after each round of large-scale capital expenditure, the products enter the price reduction cycle, and the gross profit margin decreases.

Samsung Electronics is the leader of memory chips, and the fluctuation of product gross profit margin is less than that of micron and SK Hynix. On the one hand, Samsung Electronics is a group company, and memory chips only contribute 20%~30% of the revenue. On the other hand, Samsung Electronics dominates the market, and the timing of multiple production expansion is earlier than micron and SK Hynix, so it can obtain higher income before each round of price decline. This dominance comes from Samsung Electronics’ technological advantages, capital scale and share advantages brought by its early counter cyclical expansion.

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In the short and medium term, prices fluctuate periodically.

1. Price periodicity of DRAM: each round is about 3~4 years.

From the perspective of price cycle, DRAM has experienced three cycles since 2012. Memory chips, including DRAM and NAND, have strong periodicity, which is mainly caused by the mismatch between demand and supply. From the perspective of time dimension, DRAM prices generally take 3-4 years as a cycle.

(1) The first cycle: 12q3~16q2. 12q3 to 14q2: the cycle goes up. The main driving force is the outbreak of smart phones, and the demand for DRAM increases; From 14q3 to 16q2, the cycle downlink is 4GB (512MB × 8) For 1600MHZ DRAM particles, for example, the unit price fell from $4.43 to $1.44, with a range decrease of 67%, mainly due to the oversupply caused by the expansion of production by various manufacturers.

(2) The second cycle: 16q3~19q4. From 16q3 to 18q2, the cycle went up, mainly because major manufacturers such as micron, Samsung and SK Hynix transferred their main production capacity to produce 3D NAND flash, and DRAM had no production expansion plan. At the same time, demand growth led to insufficient capacity and shortage of DRAM particles, and the price went up, 4GB (512MB × 8) The price range of 1600MHZ DRAM particles increased by 187%; From 18q3 to 19q4, the cycle went down. The trade friction between China and the United States led to sluggish global downstream demand, poor demand for servers, PCs, laptops, etc. DRAM oversupplied, 4GB (512MB × 8) The price range of 1600MHZ DRAM particles decreased by 67%.

(3) The third cycle: 20q1 to now. Under the epidemic, online economy, home office and other demands have driven the surge of server, TV and PC shipments. 5g mobile phone upgrade has driven the upgrading of single machine capacity, driving DRAM prices to rise. At present, the demand for 21q2 PCs is booming, manufacturers stock up, servers usher in the procurement peak, mobile phones and other consumer electronics gradually enter the stock peak, and the demand for VGA cards / game consoles / virtual currencies is strong. From the beginning of 21q3, as the demand for smart phones and other consumer electronics entered the downturn, storage manufacturers continued to de stock, and DRAM prices were corrected. The price correction continued to 22q1. Trendforce predicted that this round of price reduction would continue to 22q2. Since 20q1, the range has increased by 81%.

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2. The price periodicity of NAND flash: each cycle is about 3-4 years.

Similar to DRAM, NAND flash has the characteristics of periodic fluctuation. Since 2012, NAND has experienced three cycles, one of which is about 3-4 years.

1) The first cycle: 12q3~15q4. The driving force of the upward cycle before 2013 is the explosion of demand for smart phones. In 2013, the decline of PC sales led to continued weak demand. At the same time, the major storage plants opened new capacity, resulting in fierce price war. The overall supply of storage chips exceeded demand, and the price of NAND flash decreased significantly to 64GB (8GB × 8) Take NAND flash as an example. From 2013q2 to 2016q4, the unit price of particles fell from $6.10 to $2.32, with a range decrease of 62%.

2) The second cycle: 16q1~19q4. From 16q1 to 17q2, the cycle goes up. In order to improve product competitiveness, non Apple smart phone brands accelerate to increase the capacity of EMMC / UFS. SSD solid-state disk demand also ushers in an explosion, and NAND flash demand continues to rise. While most manufacturers are in the process of changing from 2D to 3D, the yield climb is generally slow, the supply decline is serious, and the imbalance between supply and demand causes the price of NAND flash to continue to rise. 64GB (8GB) during periodic uplink × 8) The unit price of NAND flash increased by 105%. From 17q3 to 19q4, the cycle went down. The 3D NAND yield of manufacturers increased and production expanded significantly. On the demand side, only the smartphone demand momentum continued. The demand for other parts such as servers, PCs and tablets was weak. The NAND flash market price weakened significantly until the end of 2019. 64GB (8GB) during cycle downlink × 8) The unit price of NAND flash fell by 50%.

2) The third cycle: 20q1 to now. The main driving force of this cycle is the demand of 5g cycle terminal equipment for data storage and the recovery of PC, laptop, mobile phone and server demand in the post epidemic period. At the beginning of this cycle, i.e. 20q1~20q4, the price of NAND flash was in a fluctuating state, mainly because the COVID-19 superimposed the Sino US trade friction, which suppressed the demand to a certain extent. The epidemic eased the housing economy, boosted the demand for PCs and tablets, and released the storage demand. From 21q to Q2, consumer electronics such as PCs, servers and mobile phones gradually entered the peak of stock up, and NAND flash prices rose. From 21q3, as the demand for consumer electronics such as smart phones entered the downturn, storage manufacturers continued to destock, and NAND flash prices corrected, and the price correction continued to 22q1. Trendforce predicted that 22q1 still had a 5-10% decline, and Q2 prices increased by 5-10% due to the impact of Western data / Kaixia factory raw material pollution. Since 20q1, the range has increased by 40%.

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For a long period, the single bit cost shows a downward trend. According to Samsung Electronics, the DRAM technology evolution path is mainly to reduce the process. With the process upgrading, the unit GB cost continues to decline. Before 2013, the technology evolution path of NAND flash was the process. With the upgrading of the process, the unit GB cost continued to decline. In 2014, with the mass production of 3D NAND, the number of stacking layers continued to increase from 32 layers to the current 192 layers, and the unit GB cost accelerated to decline; At the same time, with the increase of storage unit density, from SLC → MLC → QLC → TLC, the cost per GB is further reduced.

The long-term cost of NAND flash declines faster than DRAM. According to McCallum statistics, comparing the cost decline trend of DRAM and NAND flash, the long-term price decline trend of NAND flash unit bit is faster than that of DRAM, and it is expected that the cost will accelerate with the increase of stack layers. This is because after breaking through the 3D stack, NAND flash has a rapid technology update and iteration, with significant economies of scale, while DRAM has a long history of development, more mature technology, and relatively slow iteration.

Source: CSC securities

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