Today’s flash based gate array is not only a series of configurable system gates, but also includes many other special functions, which can reduce system design time, improve logic utilization, reduce system cost and power, and provide better performance when providing the same functions as those implemented in configurable logic. The predefined special function blocks retain the basic FPGA logic resources, and in some cases, they can realize some functions that cannot be built by the logic modules in FPGA.
Why flash process?
In many applications, FPGA devices based on SRAM can also provide similar characteristics and functions to FPGA based on flash memory. However, when the SRAM configuration mode is used, the SRAM configuration mode also disappears; When power is restored, the system must reload the configuration mode, usually via a serial interface, which may take tens or hundreds of milliseconds.
On the other hand, in the FPGA based on flash memory, the configuration mode is saved in the nonvolatile memory unit on the chip, and even when the power supply is removed, the content in the flash memory unit remains intact; When the system restarts, the FPGA can be powered on within a few microseconds, saving valuable time and allowing the system to quickly recover from power failure or restart.
However, the progress of process technology can now enable FPGA designers to reduce the size of flash memory configuration units and integrate them into advanced logic technology, so as to promote the high-performance FPGA based on flash memory to provide no less than SRAM FPGA, even more superior features and functions, and generally have lower system cost. In addition, since there is no need for external configuration memory, flash memory based array devices have smaller system footprint and consume less power.
Flash memory technology has changed from a dedicated process to a mainstream process, enabling flash based FPGA devices to compete in a cost sensitive market while providing a logic density of more than 150k Le (Figure 1). The integration function of flash FPGA also provides a system level solution that can help reduce system complexity, reduce system power and reduce the overall system cost.
Figure 1: FPGA with up to 150k Le has many market opportunities, ranging from about $300 million defense and security market to $500 million integrated wired and wireless market
Figure 2 briefly compares the integration characteristics of flash FPGA and similar density SRAM FPGA devices.
Figure 2: comparison of integration characteristics between flash FPGA and SRAM FPGA (for devices with less than 150k LE)
Although the FPGA based on flash memory and the FPGA based on SRAM with the same density have many things in common, in addition to the different configuration of flash memory or SRAM, there are many significant characteristic differences between them, mainly the number of I / O pins, the number of SerDes channels, and the flash based FPGA adds high-performance memory subsystem and embedded security functions, including aes256 or sha256 encryption / decryption function.
For medium density range devices, designers have rich choices in characteristics, I / O pins, and packaging options, which can meet the needs of any system. However, different product families provide different feature combinations, so no product family can solve each system requirement. The same is true for embedded system support functions that help designers reduce system complexity. Many FPGA devices based on flash memory and SRAM have the same functions, such as PCIe endpoint, SRAM module, DSP module (configurable multiplier accumulator function) and other on-chip functions, as well as programmable logic modules.
However, more unique functions, such as embedded processor, storage controller, multi Gigabit / sec SerDes port, and dedicated data confidentiality / decryption support, are limited to individual devices.
The power consumption in active power and standby mode is usually the decisive factor in the selection of FPGA, especially if the final system must operate in low power mode, or must work with backup battery for as long as possible in case of power failure.
Figure 3 shows the different operation modes of FPGA devices during system startup and continuous operation. Compared with SRAM based FPGA devices, flash memory based devices provide many energy-saving advantages because they have no inrush power and configuration power, so they can operate at a significantly lower operating power than SRAM FPGA devices.
Figure 3: power considerations: SRAM FPGA vs. flash FPGA
Increasing connectivity forces designers to make greater efforts to maintain system security to prevent hacker attacks and provide the ability to securely communicate with other systems via the Internet.
However, once a system is connected to the Internet, it will become the target of hackers. Hackers may try to damage the system by downloading new configuration data. In order to prevent this from happening, some FPGA devices have added security subsystems to ensure that only authorized configuration codes or control programs will be loaded and executed. This process is called “safe startup”. Now some built-in countermeasures can prevent physical attacks, such as tamper proof and memory zeroing. FPGA devices based on flash memory can use on-chip secure flash storage to keep secret keys and key data.
Today’s FPGA devices can add hardwired system security modules to implement NIST certified aes256, sha256 and elliptic curve encryption algorithms in order to provide real-time encryption / decryption. In addition, random number generator and physical non cloning function (PUF) can be added. PUF can be used to generate private keys in public key infrastructure (PKI) scheme, which is only known by the device, so as to simplify user key management; Of course, random numbers are also widely used in cryptographic protocols. Today’s security centric SOC FPGAs can be programmed only by authorized encrypted bitstreams. Some designers integrate industry standard microcontrollers and subsystems with built-in security features.
Today, many other characteristics of FPGA devices provide system solutions for network and data communication market applications. For example, add on-chip 5 Gigabit SerDes ports and multiple PCIe serial interfaces as high bandwidth interfaces for applications such as XAUI / xgxs and other high-speed network interfaces. By adding enough general-purpose I / O pins, today’s FPGA devices also provide the necessary I / O pin to core logic ratio, so as to ensure that designers do not need to select larger FPGA devices that exceed the required size to obtain a higher number of I / OS. Finally, sufficient static RAM and embedded nonvolatile memory (at least 5 megabit SRAM and 4 megabit envm) provide sufficient storage for designers to save register files, cache and buffer storage. Combined with the integrated DSP module, FPGA devices can implement complex signal processing algorithms and network protocols, process packet inspection, and other network functions.
Flash based FPGA provides a wide range of functions, allowing designers to create highly integrated system solutions to reduce system costs, minimize printed circuit board area and power requirements, and provide performance advantages over SRAM FPGA.