With the development of China’s national economy, the car ownership has increased dramatically. At the same time, with the rapid development of highway construction, the current highway traffic shows the trend of high-speed driving, intensive traffic flow and non professional drivers. The traffic accidents caused by automobile collision endanger people’s life and property safety. According to NHTSA’s statistical data on the collision position of passenger vehicles in traffic accidents in 2009, in all kinds of traffic accidents, vehicle front collision accounts for 62% of the total accidents, most of which are caused by traffic accidents caused by lane departure, so the design of lane departure warning system can effectively reduce the occurrence of forward collision Probability can effectively reduce the loss of road traffic accidents.
In this paper, the advantages of SOPC (programmable system on chip) technology, such as flexible design, tailoring, expandable, upgradeable and short design cycle, are used to design a lane departure warning system which can be flexibly configured and easily upgradeable for maintenance.
1. Overall technical route of the system
According to the functional requirements of the system, the processing flow of the system is divided into three stages: image preprocessing, feature extraction and feature discrimination, as shown in Figure 1.
(1) Image preprocessing. The system obtains the lane image in front of the vehicle through the camera, and completes the collection, graying and filtering enhancement of the digital image through the digital image processing technology;
(2) Feature extraction. Sobel edge detection algorithm is used to detect the edge of the image, and Hough transform is used to check the lane line;
(3) Feature discrimination. According to the lane marking information, the edge detection function EDF is used to make the relevant deviation decision.
2. Hardware design of the system
The hardware composition of lane departure detection system based on FPGA is shown in Figure 2. The system uses CCD camera to collect lane image, decodes the obtained video through video analog-to-digital converter ADV7181, obtains digital video signal, stores it in SDRAM for LCD display, and as the original information for the image signal processing unit to complete the image processing task, and extracts lane information from it.
Nios II, a soft core processor embedded in FPGA, is the control core of the whole system, which completes the whole system software process execution control, Hough transformation, lane detection and collision warning tasks; Nios II processor completes data exchange and control with other components of SOPC system through Avalon exchange architecture. The image signal processing unit of FPGA internal components completes the tasks of digital image signal preprocessing, median filtering and denoising, Sobel edge detection and so on. The processing results are the basis of Nios II lane departure detection.
The peripheral memory devices SDRAM, flash, SRAM, SDRAM are used to store image information, flash is used to store program and system parameter configuration, sramn is used to store software temporary data: the system uses keys and LCD as human-machine interface.
Additional logic is used to complete other auxiliary tasks of the system.
3. Software process
3.1 system software process
The software execution flow chart of lane departure detection system is shown in Figure 5. After power on, the initialization is completed, the configuration information of FPGA in EPCs and the program in flash are configured into FPGA, and the initialization of camera and other system components is completed.
After the initialization, the system will enter the lane departure detection and early warning process. Start the camera to start image acquisition, and call the FPGA internal image processing module to perform color space conversion, graying, median filtering, edge detection and other operations on the image.
After loading the edge detection image, the program divides the image into left and right parts for line detection. Considering the fact that the probability of lane approaching horizontal or vertical is very small in practical application, and in order to filter out interference (such as horizon, roadside lamp post, front vehicle edge, etc.), the following strategies are adopted in the process of line detection by Hough transform: in the left half image, the direction angle is between 95 ° – 175 °, and in the right half image, the direction angle is between 95 ° – 175 ° The direction angle is between 5 ° and 85 °. During the searching process, the whole image is traversed, and after the searching calculation, the local maximum value is found in the accumulator a (ρ, θ), so as to determine the location and parameters of the lane marker.
After calling Hough transform function to recognize the straight line, if there is available lane information after image processing, enter the lane departure warning and decision process, lane departure warning also uses two-level warning mechanism, when the deviation angle is greater than the warning value, an audible and visual warning will be issued; when the deviation angle is less than the warning value but greater than the warning value, an audible and visual warning will be issued. If there is no relevant lane information after image processing, it will return to the obstacle detection and collision warning process.
The system makes full use of the programmable features of FPGA and the reconfigurable features of SOPC system. The system upgrade and maintenance is very convenient, which can greatly extend the life cycle of the system. At the same time, the single chip solution with FPGA as the core is adopted, which has simple peripheral circuit and can make the volume of the system very small. In addition, the system can also be carried out by means of custom module, custom instruction, C2H, etc Acceleration, the idea is to sacrifice hardware resources in exchange for the improvement of computing speed. Through acceleration, the real-time requirements of image processing can be achieved, so as to further improve the real-time performance of lane departure detection system and improve the practicability of the system.
Editor in charge: GT