At the beginning of this year, the optical networking forum (OIF) officially set the initial specification of flexible Ethernet to 100gbits/s. OIF will add more details to the specification and support 25g, 200g and 400g in version 2.0, which is expected to start in November. The new generation Ethernet chip currently under development will help […]
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When will VR technology really enter the homes of ordinary people?
The cloud summit of the 2020 world VR industry conference, CO sponsored by the Ministry of industry and information technology and the people’s Government of Jiangxi Province, was held in Nanchang from October 19 to 20. The conference was held in the form of online and offline simultaneous meetings and international and domestic venues. In […]
Xiaomi’s first peak meter shutter 3D glasses, 120Hz fast refresh rate, 1080p HD picture, priced at 139 yuan
Recently, Xiaomi Youpin launched fengmi shutter 3D glasses at a price of 139 yuan, which perfectly matches the ultra short focus laser projection such as Mijia laser TV (9999 yuan). The 3D glasses also feature fast refresh rate, no residual image, 40 hour endurance, compatible vision and matching glasses. It adopts 120Hz fast refresh rate […]
Working principle of jesd204b and detailed explanation of its control characters
At present, the trend of using jesd204b as the preferred digital interface of high-speed data converter is in full swing. The jesd204 interface was first released in 2006. It was revised to jesd204a in 2008 and to jesd204b in August 2011. Compared with previous technologies such as LVDS, this interface is superior in efficiency and […]
Design and implementation of physical layer in satall protocol structure layer based on FPGA
AbstractAs a high-speed serial, point-to-point transmission hard disk interface, SATA has replaced IDE hard disk interface. At present, sataii and sataiii are widely used in hard disks, and their line rates reach 3gbit • S-1 and 6 Gbit • S-1 respectively. In this paper, the sataii protocol is comprehensively analyzed, and the soft IP core […]
SPI4. What is the principle of 2 bus? How to debug?
introduction SPI4. 2 bus (system packet interface) is an inter chip interconnection bus with a speed of up to 10 GB / s. It is mainly used in high-end occasions such as ATM cell transmission, POS (packet over SONET / SDH) and 10 GB / s Ethernet. Especially in the communication field, many high-end processors […]
Introduction to demand analysis of 5g infrastructure and end-to-end programmability
1. IntroductionAt present, we are in the transition period of cellular connection, and the ubiquitous wireless connection in the future is rising. Globally, the success of 2G, 3G and 4G has driven the use of mobile phones to an incredible 7.5 billion. Surprisingly, this makes the number of mobile devices more than the global population. […]
Detailed usb3 0 system design challenges and new ESD protection strategies
In 1996, the well-known universal serial interface (usb1.0) was first introduced. It can support low-speed (LS) mode and full speed (FS) mode, providing 1.5mbps and 12mbps rates respectively. 2000, USB2 0 is available. Its new high-speed (HS) mode can provide a rate of up to 480mbps, and is still downward compatible with low-speed mode and […]
Grasp the key problems of jesd204b interface function
Author: Anthony Desimone, application engineer of ADI company; Michael giancioppo, application engineer Jesd204b is a recently approved JEDEC standard for serial data interface between converter and digital processor. It is the third generation standard and solves some defects of the previous version. The advantages of the interface include less circuit board space for data interface […]