[ZYNQ Ultrascale+ MPSOC FPGA Tutorial] Chapter 8 FPGA On-Chip FIFO Read and Write Test Experiment

Statement of originality: This original tutorial was created by ALINX Electronic Technology (Shanghai) Co., Ltd. (ALINX), and the copyright belongs to the company. If you want to reprint, you need to authorize and indicate the source. Applicable board models: AXU2CGA/AXU2CGB/AXU3EG/AXU4EV-E/AXU4EV-P/AXU5EV-E/AXU5EV-P /AXU9EG/AXU15EG The experimental Vivado project is “fifo_test”. FIFO is a very important module in FPGA […]

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[ZYNQ Ultrascale+ MPSOC FPGA Tutorial] Chapter 13 RS485 Experiment

Statement of originality: This original tutorial was created by ALINX Electronic Technology (Shanghai) Co., Ltd. (ALINX), and the copyright belongs to the company. If you want to reprint, you need to authorize and indicate the source. Applicable board models: AXU2CGA/AXU2CGB/AXU3EG/AXU4EV-E/AXU4EV-P/AXU5EV-E/AXU5EV-P /AXU9EG/AXU15EG The experimental Vivado project is “rs485_test”. This chapter uses AN3485 module to introduce RS485 […]

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[ZYNQ Ultrascale+ MPSOC FPGA Tutorial] Chapter 14 HDMI Output Experiment

Statement of originality: This original tutorial was created by ALINX Electronic Technology (Shanghai) Co., Ltd. (ALINX), and the copyright belongs to the company. If you want to reprint, you need to authorize and indicate the source. Applicable board models: AXU2CGA/AXU2CGB/AXU3EG/AXU4EV-E/AXU4EV-P/AXU5EV-E/AXU5EV-P /AXU9EG/AXU15EG The experimental VIvado project is “hdmi_out_test”. We introduced the LED flashing experiment earlier, just […]

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[ZYNQ Ultrascale+ MPSOC FPGA Tutorial] Chapter 15 HDMI Character Display Experiment

Statement of originality: This original tutorial was created by ALINX Electronic Technology (Shanghai) Co., Ltd. (ALINX), and the copyright belongs to the company. If you want to reprint, you need to authorize and indicate the source. Applicable board models: AXU2CGA/AXU2CGB/AXU3EG/AXU4EV-E/AXU4EV-P/AXU5EV-E/AXU5EV-P /AXU9EG/AXU15EG The experimental Vivado project is “hdmi_char”. In the HDMI output experiment, the HDMI display […]

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[ZYNQ Ultrascale+ MPSOC FPGA Tutorial] Chapter 17 Vitis Preparation Project and Precautions

Statement of originality: This original tutorial was created by Xinyi Electronic Technology (Shanghai) Co., Ltd. (ALINX), and the copyright belongs to the company. If you want to reprint, you need to authorize and indicate the source. Applicable board models: AXU2CGA/AXU2CGB/AXU3EG/AXU4EV-E/AXU4EV-P/AXU5EV-E/AXU5EV-P /AXU9EG/AXU15EG 1. Software environment The software development environment is based on Vivado 2020.1 2. Hardware […]

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[ZYNQ Ultrascale+ MPSOC FPGA Tutorial] Chapter 18 Hello World (Part 1)

Statement of originality: This original tutorial was created by Xinyi Electronic Technology (Shanghai) Co., Ltd. (ALINX), and the copyright belongs to the company. If you want to reprint, you need to authorize and indicate the source. Applicable board models: AXU2CGA/AXU2CGB/AXU3EG/AXU4EV-E/AXU4EV-P/AXU5EV-E/AXU5EV-P /AXU9EG/AXU15EG The vivado project directory is “ps_hello/vivado” Starting from this chapter, FPGA engineers and software […]

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[ZYNQ Ultrascale+ MPSOC FPGA Tutorial] Chapter 19 Hello World (Part 2)

Statement of originality: This original tutorial was created by ALINX Electronic Technology (Shanghai) Co., Ltd. (ALINX), and the copyright belongs to the company. If you want to reprint, you need to authorize and indicate the source. Applicable board models: AXU2CGA/AXU2CGB/AXU3EG/AXU4EV-E/AXU4EV-P/AXU5EV-E/AXU5EV-P /AXU9EG/AXU15EG This article is based on the content of Chapter 18 for software development [ZYNQ […]

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[ZYNQ Ultrascale+ MPSOC FPGA Tutorial] Chapter 20 PS RTC Interrupt Experiment

Statement of originality: This original tutorial was created by ALINX Electronic Technology (Shanghai) Co., Ltd. (ALINX), and the copyright belongs to the company. If you want to reprint, you need to authorize and indicate the source. Applicable board models: AXU2CGA/AXU2CGB/AXU3EG/AXU4EV-E/AXU4EV-P/AXU5EV-E/AXU5EV-P /AXU9EG/AXU15EG The vivado project directory is “ps_hello/vivado” The vitis project directory is “ps_rtc/vitis” 1. RTC […]

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[ZYNQ Ultrascale+ MPSOC FPGA Tutorial] Chapter 21 PS UART Read and Write Control

Statement of originality: This original tutorial was created by ALINX Electronic Technology (Shanghai) Co., Ltd. (ALINX), and the copyright belongs to the company. If you want to reprint, you need to authorize and indicate the source. Applicable board models: AXU2CGA/AXU2CGB/AXU3EG/AXU4EV-E/AXU4EV-P/AXU5EV-E/AXU5EV-P /AXU9EG/AXU15EG The vivado project directory is “ps_hello/vivado” The vitis project directory is “ps_uart/vitis” Software Engineer […]

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[ZYNQ Ultrascale+ MPSOC FPGA Tutorial] Chapter 22 Use of I2C on the PS side

Statement of originality: This original tutorial was created by ALINX Electronic Technology (Shanghai) Co., Ltd. (ALINX), and the copyright belongs to the company. If you want to reprint, you need to authorize and indicate the source. Applicable board models: AXU2CGA/AXU2CGB/AXU3EG/AXU4EV-E/AXU4EV-P/AXU5EV-E/AXU5EV-P /AXU9EG/AXU15EG The vivado project directory is “ps_hello/vivado” The vitis project directory is “ps_i2c/vitis” Software Engineer […]

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