At the "2021 Synopsys Developer Conference" held yesterday, Suiyuan Technology was invited to deliver three speeches in the technical sub-forums of "Artificial Intelligence" and "High Performance Computing", sharing R&D cases and experiences.

Realization of Hyperscale AI Prototype System Based on HAPS

As the area of ​​artificial intelligence chips continues to increase, the chip bus design becomes more and more complex, which brings more difficulties and challenges to the prototype verification platform. Compared with the previous generation HAPS80, the Synopsys HAPS100 device has 60% more FPGA LUT resources, 50% more physical interfaces, and more memory and DSP resources.

Devices based on HAPS100 will be able to integrate more computing units without dividing a large area of ​​IP, reducing the wiring delay between FPGAs, increasing the operating frequency of the entire AI system, and building a complete and efficient AI neural network system. This is very beneficial for Suiyuan Technology to fully verify the complete function of the chip from the system level, which can find possible hidden defects in the design, reduce the risk of product tape-out, and accelerate the completion of verification to meet the requirements of chip tape-out.

Building efficient and safe AI chip software

In three and a half years, Suiyuan Technology completed the landing and mass production of Susi 1.0 and the release of the second-generation training chip Sui Si 2.0, which fully proved Suiyuan's strength in chip design and mass production, but the implementation of hard technology also It is inseparable from the participation and escort of software.

Software support is required from the architecture software evaluation in the initial design stage, the DV test case and Diagnostics program development in the chip verification stage, the mass production test and system verification tools after the chip is taped out, and the software full stack for the final business implementation. Therefore, the quality of software is one of the main challenges for the implementation of artificial intelligence accelerator cards. Efficient and high-quality self-developed tool software is a favorable guarantee for the implementation process, and efficient and safe AI business software is also an important guarantee for realizing customer value.

In the process of software development, Suiyuan Technology uses various open source tools, commercial tools and their combinations to give full play to the capabilities of each tool, supplemented by efficient and agile pipelines, to achieve software quality inspection and continuous integration, and to ensure that from the beginning of design. software development quality.

Using ZeBu Empower to speed up power analysis before tape-out

With the increasing complexity of artificial intelligence application scenarios and workloads, Suiyuan Technology's second-generation training chip "Suisi 2.0" needs to optimize system power consumption to a minimum while providing high throughput. Through the cooperation with Synopsys, Suiyuan can run complex software workloads in the Zebu Empower simulation system in the early stage of chip design, so as to verify and optimize the power consumption architecture of the chip from a global perspective. The excellent performance of Zebu Empower enables the design team of Suiyuan Technology to complete the rapid iteration of power consumption analysis and optimization, reduce the risk of product power consumption, and finally achieve the established power consumption target of the product.

Wang Yongdong also won the "Excellent Paper Award" at the developer conference.

Original title: Suiyuan Technology shares AI chip development experience with Synopsys developers

Article source: [WeChat public account: Suiyuan Technology Enflame] Welcome to add attention! Please indicate the source when reprinting the article.
Responsible editor: pj

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