Overview of rgmii

Rgmii interface is the abbreviation of reduced Gigabit media independent interface. IEEE 802.3clause35 defines a set of interface gmii between RS sublayer and PCs sublayer, which is used as MAC and PHY data interaction interface. However, the biggest problem in the practical application of this interface is that if Mac and PHY are divided into two different chips, gmii pins (24pin) will increase the packaging cost, so the rgmii with 12Pin is born.

Rgmii application block diagram

Figure 1 shows the application block diagram of rgmii. The application of rgmii is very simple and serves as the data communication interface between MAC and PHY.

Rgmii interface signal

From the rgmii interface signal, we can see that the so-called reduced gmii is to reduce the original gmii 125MHz single edge transceiver 8 bit data bus (TXD [7:0], RXD [7:0]) to 125MHz dual edge transceiver 4 bit data bus. At the same time, the data valid signal (TX_ EN,RX_ DV) and error indication signal (TX)_ ER,RX_ Er) is reduced to 1 bit control signal line.

When rgmii works in 100m and 10m mode, it still works in single edge mode. The data remains unchanged when the channel clock (TXC / RXC) goes down.

Rgmii interface frame format

Fig. 2 shows the transmission of an effective data frame. During effective frame transmission, RX_ CTL is high level on both sides of RXC, which means Rx_ EN=1,RX_ ERR=0。 When the frame transmission is completed, Rx is on the rising edge of the next RXC_ CTL down, then Rx_ CTL was always low. Note that the RXC falling edge Rx is in the frame gap_ CTL is 0, but Rx is at the rising edge of adjacent RXC_ CTL is also 0, so it will not be recognized as Rx_ ERR。 As can be seen from the figure, for a valid frame, RX_ CTL is always lowered at the rising edge of RXC.

Fig. 3 shows the transmission of an invalid frame. When transmitting the first byte of data, RX_ CTL is 1 at the rising edge of RXC and 0 at the falling edge of adjacent RXC, so it is recognized as Rx_ ERR。 This data frame, the whole frame will be discarded. RX_ Err can appear anywhere in a frame of data transmission, when Rx_ After err is recognized, the whole frame will be discarded.

Rgmii interface has made an indelible contribution to reduce the packaging cost. However, due to the double edge sampling, the actual working frequency has reached 250MHz, which is close to the limit for general digital io. Rgmii has two fatal defects: 1. Because of double edge sampling, each bit has only 4 ns effective time, so the timing convergence is not friendly. Therefore, when rgmii interface is implemented, usually TXC / RXC will do coarse adjustment of 90 °, 180 °, 270 ° and 360 ° phase, which is convenient for sampling timing adjustment. There are even chips that use DLL to fine tune on the basis of 90 degree coarse tuning. 2. Whether there is valid data or not, TXC / RXC is continuously flipping at 125MHz. This kind of periodic flip noise is easy to cause noise interference and affect the work of nearby analog IP. It will also bring radiation, leading to EMC test failure. In order to solve the defects of rgmii, sgmii based on SerDes interface came into being. Sgmii interface not only solves the defects of rgmii, but also further reduces the number of pins. Currently, Gigabit phy and rgmii / sgmii interfaces are supported on the market.


Writing rgmii interface is actually a little hesitant, because from the performance of an article about MDIO before, Ethernet seems to be declining, and few people are interested in it. However, the author has a special feeling for Ethernet, because after leaving the school, he read a protocol with thousands of pages of IEEE802.3. In retrospect of those passionate days, I still feel excited and can’t help but talk with my classmates.

In fact, rgmii also has a very popular function, which is rtbi, which simplifies TBI, because there are few applications, this article does not mention it.

Editor in charge: CC

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