In engineering, ADS is often used to design the RF power amplifier bare chip circuit level, and then the bare chip circuit schematic or layout is co-simulated with the designed substrate. Commonly used die and substrate co-simulation methods include the use of ADS + Momentum or ADS nesting techniques or ADS + HFSS, etc. Since the actual parasitics of RF circuits are difficult to accurately simulate, engineers are often confused about what kind of substrate co-simulation method to use during the design and development of RF power amplifier chips.

 

 

This paper takes the self-developed RF power amplifier chip with an operating frequency of 2GHz as an example, from the algorithm theory of the simulator, the specific modeling method of the co-simulation, the modeling complexity, the simulation time, and the comparison of the measured results. The commonly used substrate co-simulation methods are compared and discussed, and the simulation experience that is helpful to the actual RF power amplifier chip engineering design is tried to be summarized.

introduction

In engineering, ADS is commonly used for RF power amplifier (PA) bare chip (Die) circuit-level design. In order to improve the simulation accuracy, the bare-die circuit schematic or layout will be co-simulated with the designed substrate. Commonly used die and substrate co-simulation methods include the use of ADS+Momentum or ADS Nested Technology or ADS+HFSS. Since the actual parasitics of RF circuits are difficult to accurately simulate, engineers are often confused about what kind of substrate co-simulation method to use during the design and development of RF power amplifier chips. This paper takes the RF power amplifier chip (PA#L03) with an operating frequency of 2GHz independently developed by ADS2014 and HFSS 15.0 as an example, from the algorithm theory of the simulator, the specific modeling method of co-simulation, modeling complexity, simulation time, comparison The above-mentioned common substrate co-simulation methods are compared and discussed from several aspects such as the actual measurement results, and the simulation experience that is helpful to the actual RF power amplifier chip engineering design is tried to be summarized.

The circuit design schematic diagram (top layer) of the RF power amplifier chip PA#L03 in this example is shown in Figure 1.

 

 

1 Comparison of various simulator algorithms

ADS is a RF circuit simulation tool based on the method of moments (MoM) introduced by Agilent of the United States. Its EM simulators include Momentum Microwave and FEM. The Momentum algorithm is based on the Moment Method (MoM, Method of Moment), and the FEM algorithm is based on the Finite Element Method (FEM, FiniteElement Method). HFSS is an electromagnetic simulation software based on the finite element method for high-frequency structures launched by Ansoft. The following briefly introduces the method of moments and the finite element method [1, 2].

(1) Finite Element Method (FEM)

The finite element method was proposed in the 1940s, and later this method was developed and widely used in structural analysis problems. The finite element method is a numerical calculation method based on the variational principle. Applying the variational principle, the boundary value problem to be solved is transformed into the corresponding variational problem, and the discretization variational problem is the extreme value problem of the ordinary multivariate function by using the division and interpolation of the field, and then a set of multivariate Algebraic equations, the numerical solution of the boundary value problem can be obtained by solving the algebraic equations. Generally, the following steps are required:

①Regional discretization. That is, the field or object is divided into a limited number of sub-domains, such as triangles, quadrilaterals, tetrahedrons, hexahedrons, etc.;

②Select the interpolation function. Select the type of the interpolation function such as polynomial, and use the field value of the node (graphic fixed point) to obtain an approximation of the field at each point of the subdomain. The interpolation function can be selected as first-order (linear), second-order (quadratic), or higher-order polynomials. Although higher-order polynomials have high precision, the resulting formulas are usually complex;

③Equation system formula establishment. It can be established by the Ritz method or the Galiokin method;

④ Select the appropriate algebraic solution method to solve the algebraic equation, and then the numerical solution of the boundary value problem to be solved can be obtained.

(2) Method of Moments (MoM)

The method of moments is one of the most commonly used methods in computational electromagnetism. Since Harrington proposed the basic concept of moment method in the 1960s, it has been perfected in theory and widely used in engineering. Especially in the fields of electromagnetic radiation and scattering and electromagnetic compatibility, the method of moments shows its unique advantages. The basic idea of ​​the method of moments is to dissect the geometric target, define a suitable basis function on it, then establish an integral equation, use the weight function test to generate a matrix equation, and solve the matrix equation to obtain the geometric target. current distribution from which other near and far field information can be derived.

According to the algorithm principle, Table 1 summarizes and compares the performance characteristics of the MoM and FEM algorithms.

As for the FEM simulator of ADS and the FEM simulator of HFSS, there is no big difference in algorithm principle, but there are differences in the specific implementation method of the software algorithm engine program and the setting of boundary conditions. Additionally, ADS can simulate active devices while HFSS cannot.

 

 

Table 1 Comparison of performance characteristics of MoM and FEM algorithms

2. Specific modeling methods for co-simulation of various substrates

Compared with the corresponding modeling complexity and simulation time, the author summarizes the following co-simulation methods of RF power amplifier bare core and substrate from practical engineering experience: For specific auxiliary software operation methods, please refer to [2, 3].

Method 1: Bare Die Circuit Schematic + Substrate Momentum Simulation

Step 1: In the ADS, set the ADS port (PORT) on the designed PA substrate layout (layout) where the active devices, passive devices, and external power supply are hooked, as shown in Figure 2(a). The created substrate EM substrate file (.subst) is shown in Figure 2(b).

Step 2: When setting up the ADS EM simulation, to create the Symbol and select the Symbol type as Layout look-like, run the Momentum Microwave EM simulation. After the simulation is completed, the Symbol will be automatically updated.

Step 3: In the ADS schematic diagram, hook the PA substrate layout Symbol simulated in Step 2 to the PA bare Die circuit packaged in the Symbol, as shown in Figure 3.

Step 4: Run the co-simulation set up in Step 3.

 

 

(a) Substrate Momentum emulation port settings

 

 

(b) Substrate EM substrate setup

Figure 2 Substrate Momentum simulation setup and created substrate EM substrate file

Method 2: Bare Die circuit schematic + substrate HFSS simulation (Lumped port is not de-embedded)

Step 1: In ADS, import the designed PA substrate layout into HFSS for modeling. Set the HFSS lumped port (LumpedPORT) at the hooked active device, passive device, and external power supply, as shown in Figure 4. The Lumped port in method 2 is not deembed.

Step 2: Run the HFSS simulation and export the N-port S-parameter file (.SNP) after the simulation is complete.

Step 3: In the ADS schematic diagram, link the PA substrate layout S parameter file obtained by the HFSS simulation in the second step with the PA bare Die circuit packaged in the Symbol, as shown in Figure 5.

Step 4: Run the co-simulation set up in Step 3.

 

 

Figure 3 The schematic diagram of the bare Die circuit + the overall diagram of the Momentum co-imitation setting of the substrate

Method 3: Bare Die Circuit Schematic + Substrate HFSS Simulation

(Lumped port de-embedding) The steps of method 3 are the same as those of method 2, except that all ports are de-embedded before exporting the N-port S-parameter file.

 

 

Figure 4 Substrate HFSS simulation setup

 

 

Figure 5. The schematic diagram of the bare Die circuit + the overall diagram of the HFSS co-imitation setting of the substrate

Method 4: Bare Die Layout Momentum Simulation + Substrate HFSS Simulation

Step 1: Import the designed PA bare Die layout (using Cadence Virtuoso in this example) into the ADS layout.

Step 2: Since a complete PA bare Die layout EM simulation needs to set a lot of ports, the resources and memory required for the simulation are correspondingly very large, and the simulation hardware system with a moderate configuration requires a very long running time or even cannot run. Method 4 usually requires simplifying the PA bare Die layout. Since high-frequency parasitics mainly affect the output stage of the PA, the PA Die layout in Method 4 only retains the output stage and pad (PAD), and removes all active devices and resistors. Then, similar to the first step in method 1, set the ADS port to the simplified layout. Each place where the triode is connected needs to be set with 3 PORTs corresponding to each pole respectively. As shown in Figure 6.

Step 3: Similar to Step 2 in Method 1, create a Symbol in ADS and select the Symbol type as Layout look-like, and run the Momentum Microwave EM simulation. After the simulation is completed, the Symbol will be automatically updated.

Step 4: Obtain the HFSS simulation S-parameter file of the PA substrate according to steps 1-2 in method 2.

Step 5: In the ADS schematic diagram, link the PA bare Die layout Symbol simulated in steps 1-3 of this method with the substrate S parameter file obtained by the HFSS simulation.

Step 6: Run the co-simulation set up in Step 5.

 

 

Figure 6 Simplified PA bare Die layout and ADS port settings

Method 5: Momentum simulation of bare Die layout + Momentum simulation of substrate

Step 1: Same as steps 1-3 in Method 4, perform Momentum simulation on the PA bare Die layout to obtain the PA bare Die layout simulation EMModel.

Step 2: Same as steps 1-2 in method 1, perform Momentum simulation on the layout of the PA substrate to obtain the emModel of the layout of the PA substrate.

Step 3: In the ADS schematic diagram, hook the PA bare Die layout EM Model simulated in the first step of this method with the missing active and passive components and the PA substrate layout emModel simulated in the second step of this method. Hang it up, as shown in Figure 7.

Step 4: Run the co-simulation set up in Step 3.

 

 

Figure 7 PA bare Die layout emModel hooks active and passive devices (partial)

Method 6: Bare Die Layout + Substrate ADS Nesting Technology

(Nested Technology) Simulation ADS Nested Technology (Nested Technology) simulation method is detailed in ADS Help. The simulation layout nesting settings for this example and the created nested substrate file are shown in Figure 8.

 

 

(a) ADS nesting technology simulation port settings

 

 

(b) Substrate nested bare Die EM substrate setup

Figure 8 The simulation layout nesting settings for this example and the created nesting technology substrate file

In this example, the above-mentioned various substrate co-simulation methods are used to simulate the self-developed PA chip (PA#L03). The corresponding modeling complexity and simulation time are summarized in Table 2 (simulation system configuration: dual-core 3.2GHz CPU, 16GB memory, 64-bit computer; simulation software version: ADS 2014, HFSS 15.0).

Table 2 Comparison of modeling complexity and simulation time of various substrate co-simulation methods

 

 

3 The results of the co-simulation of various substrates, the circuit schematic diagram ADS simulation results and the comparison of the measured results

The PA#L03 chip in this example was developed and tested for debugging. The results of the co-simulation of the above various substrates, the circuit schematic diagram ADS simulation results and the measured results are shown in Table 3 (C1_1, C1_2, C2 represent the first and second matching capacitors in the first section and the matching capacitor in the second section respectively; Pout is the output power; Pin is the input power; PAE is the power added efficiency). Figure 9 provides a more intuitive comparison of the data in Table 3.

 

 

Table 3 Simulation results of various substrate co-simulation methods, circuit schematic diagram ADS simulation results and comparison of measured results

 

 

Figure 9 Visual comparison of the data in Table 3

4 Conclusion

This paper takes the self-developed RF power amplifier chip as an example, from the algorithm theory of the simulator, the specific modeling method of the co-simulation, the modeling complexity, the simulation time, and the comparison of the measured results. Several commonly used substrates are co-simulated. The methods are compared and discussed, trying to summarize the following simulation experience (for the current software version) that may be helpful for the actual RF power amplifier chip engineering design:

(1) The ADS simulation results of the circuit schematic diagram are relatively close to the measured results, but in order to improve the simulation accuracy, it is recommended to perform the substrate EM co-simulation as much as possible.

(2) Using HFSS to set the Lumped port to simulate the substrate, the simulation results without de-embedding (method 2) are closer to the measured results than de-embedding (method 3).

(3) The method of bare Die circuit schematic + substrate EM simulation (methods 1 and 2) is closer to the measured results than the circuit schematic ADS simulation results: the difference in quiescent current is about 22%; the difference in output power is about 0.8 ~ 1.6dB; efficiency The difference is about 11% to 33%. From an accurate point of view, method 1 and method 2 are not much different; however, method 2 using HFSS takes much less simulation time than method 1 using Momentum, which is understandable from the algorithm principles of FEM and MoM.

(4) The method of bare Die layout EM simulation + substrate HFSS simulation (method 4) is closer to the measured results than methods 1 and 2 in the simulation of output power and gain, but it takes a long time and the simulation of efficiency is not accurate enough .

(5) The method of using bare Die layout EM simulation + substrate Momentum simulation (method 5) is inaccurate and time-consuming, and is not recommended.

(6) The use of ADS nesting technique (method 6) is not accurate and time-consuming, and is not recommended.

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