·Start R & D work, promote data center architecture transformation through memory expansion and pooling solutions, and realize decomposable and composable server architecture
·Combining the unique expertise of high-speed interface, embedded security and server memory buffer, we have developed a breakthrough next-generation data center solution
·Promote CXL’s Roadmap and market leadership by acquiring key components from PLDA and AnalogX
Beijing, China, June 22, 2021 – as an industry-leading chip and IP core provider dedicated to making data transmission faster and more secure, Rambus Inc. (NASDAQ: RMBs) today announced the launch of the CXL memory interconnection program, which aims to define and develop semiconductor solutions for advanced data center architectures, maximize performance and efficiency, and reduce system costs. In order to support the continuous growth and specialization of server workload, the data center is turning to a decomposing architecture composed of shared and scalable computing and memory resource pool. Compute Express Link ™ （ CXL is a key driver of the next generation of decomposing server architecture. As part of the above initiatives, Rambus is focusing its initial research and development on semiconductor solutions to support key memory expansion and pooling use cases. The acquisition of PLDA and AnalogX has provided us with key products and expertise, enhanced the company’s leading position in server memory interface chips, and further accelerated the roadmap of innovative CXL interconnection solutions for next generation data centers.
Luc SERAPHIN, President and CEO of Rambus, said: “modern server architecture is taking a revolutionary step forward to support the growing demands of advanced workloads such as artificial intelligence / machine learning (ML). The plan announced today is highly complementary to our existing server DIMM chipset business and combines our unique semiconductor and systems expertise to develop breakthrough interconnection solutions that improve performance, security and efficiency for future data centers and reduce total cost of ownership. “
·CXL and PCIe ® PHY and controller for the main processor and other device interfaces
·DDR memory phy and controller for memory device interface
·Advanced encryption kernel and security protocol engine to achieve secure firmware download, and protect links from data tampering and physical attacks through integrity and data encryption (IDE) security
In addition, Rambus has extensive experience in providing memory interface chips to the server ecosystem in large quantities, and has key system level expertise, which can speed up the time to market. Rambus is working with the entire ecosystem including cloud computing, systems and memory companies to accelerate the development and application of CXL memory interconnection solutions.