At present, the market competition of electronic products is very fierce, and manufacturers hope to launch new products to the market in the shortest time, so that the design cycle of subsystem becomes shorter and shorter. In this development process, the importance of FPGA and ASIC is getting more and more attention. For example, many important functions of new system often need to be performed by these circuits. For the system with FPGA chip, power management is one of the key issues that need to be considered carefully. In order to provide stable power supply for FPGA chip, we need to comprehensively examine the overall power supply needs of the system. This method is also suitable for special application IC chips.

Due to the complex initial conditions of the system, together with other factors to be considered, such as transient behavior, switch specifications, and many other factors, it is extremely important that the power supply system must meet certain requirements. If the power supply trunk has to bypass the chip or remove the coupling relationship with the chip according to the application requirements of the chip, special care should be taken when dealing with the problem of bypass or decoupling. Figure 1 shows a typical power management system that can meet the power supply needs of FPGA chips. Generally speaking, FPGA chips need at least two voltages to provide power. One is designed to power the “core” (1.0 V to 2.5 V [typ]) and the other is designed to power the I / O (3.3 V [typ]). Many FPGA chips also need a third low noise, low ripple voltage to provide power for the auxiliary circuit. The typical power supply voltage required by FPGA chip is 2.5 V or 3.3 V, but different series of FPGA chips have different voltage requirements.

Power management of system application with FPGA chip

Asynchronous step down regulator

Function: step down (output voltage is less than input voltage)

Application conditions: Generally speaking, when the input voltage is three to five times of the output voltage, the output current is between 0.5A and 5A. Features: if the typical value of the input voltage / output voltage / output current is the same as the above value, it is very easy to design this circuit, and the design can play a very high efficiency

Application scope: all step-down regulators and controller Synchronous Step-Down regulators

Function: step down (output voltage is less than input voltage)

Application conditions: when a high efficiency system requires high output current (above 5a), or low duty cycle (input voltage is more than 5 times larger than output voltage and / or output current is not more than 0.5A) features: basic buck regulator circuit layout is adopted, which features a second switch instead of diode to help reduce the loss under the above operation conditions. Application range: any“ “Synchronous rectification” buck regulator or controller linear regulator

Function: step down (output voltage is less than input voltage)

Application conditions: Generally speaking, the output current of the application should not exceed 1a, and the voltage drop and noise must be very low

Features: most suitable for fixed output voltage, low current and low voltage drop system, and very easy to design.

Application: any low dropout linear regulator

Suggestion: most suitable for micro power system

In fact, the magnitude of current depends on many factors related to practical application, such as the speed and utilization rate of FPGA chip. The operating current can be as low as 100 mA or as high as 20 a. For these systems, the input voltage is usually higher than any power supply voltage obtained by FPGA chip, so it is necessary to reduce the voltage and stabilize it. Figure 2 shows the three most commonly used buck regulator configurations for FPGA chips. The three chips are synchronous buck regulator, asynchronous buck regulator and linear regulator. When selecting the regulator for the system, the specification requirements of the system and the operation of the regulator must be considered in detail in order to make cooperation. To ensure the smooth operation of the system design, we also need to consider the following issues.

The power supply of input voltage (VIN) FPGA chip is provided by silver box, bottom board or middle power supply trunk. The input voltage is generally between 3 V and 15 V, and the input voltage of some industrial application systems may even be as high as 30 v. The input voltage may not supply power to a certain part, because the input voltage pin of the voltage regulator has set the highest rated power supply, which can only supply power to the integrated circuit.

Output voltage (VOUT) and output current (IOUT)

In other words, no matter how the input voltage and load current fluctuate, the regulator can stabilize the output voltage at a certain level. As mentioned earlier, the operating current can fluctuate between as low as 100 Ma and as high as 20 a. Once the values of input voltage, output voltage and output current are determined, we can know what type of voltage regulator should be selected. The following are some previous experiences for engineers to refer to:

If the power consumption is less than 1W, the linear regulator should be used

”If the input / output voltage ratio is less than 2:1 and the output current is less than 3a, the asynchronous step-down regulator should be used

If the input / output voltage ratio is greater than 2:1 and the output current is greater than 5a, a Synchronous Step-Down regulator should be used to compare the reference voltage with a small part of the output voltage on the feedback pin, and then stabilize the output voltage according to the feedback voltage. The reference voltage usually specifies that the output voltage cannot exceed a certain level.

Some controllers stipulate that the starting time cannot exceed a certain time limit. Due to the regulation of this time limit, the voltage regulator can not reduce too much input voltage. The minimum starting time limit (tonmin.) of the controller also sets a limit for the output voltage, which limits the output voltage at a certain frequency not to exceed a certain level. For example, if the starting time exceeds its minimum time limit, the output voltage will rise above the specified level.

Input voltage (VIN) = 12V

Output voltage (VOUT) = 1.2V




Indicates the power consumption. But system design engineers often don’t quite understand the real meaning of efficiency. If the input current is unlimited or the battery life is not so important, the power consumption and efficiency will no longer be the most important factors. The heat energy dissipated by the system will heat the system components, and the temperature rise is directly related to the power consumption. The components affected include integrated circuits, metal oxide semiconductor field effect transistors (MOSFETs), capacitors and inductors. How much power will be dissipated in a certain area? This is also important. Generally speaking, if 1W of power is dissipated through one square inch of copper surface, and without the influence of air flow, the temperature will rise by 40 ° C due to heating.

For example, suppose:

Output voltage (VOUT) = 1.5V

Output current (IOUT) = 15A

Efficiency = 90%

Power consumption = 2.5W

If this level of power is dissipated through one square inch of copper area, the temperature will rise by 100 ° C.

Here is another example for reference:

Output voltage (VOUT) = 1.5V

Output current (IOUT) = 1.5A

Efficiency = 81%

Power consumption = 0.53w

Compared with the 90% efficiency in the previous example, this efficiency figure is not ideal. However, in this case, the power dissipation of one square inch area is only 0.53w, resulting in a temperature rise of only 20 ° C, compared with the temperature rise of 100 ° C in the previous case. The above examples show that power consumption is more important than efficiency. If system design engineers understand this, they can choose the best efficiency for the designed system and reduce the overall cost of the system. If the chip area or height specified in the volume system design is reduced, not only the cost of the system will be increased, but also the efficiency will be affected. For example, the effective series resistance (ESR) of small inductors is usually higher than that of large inductors, and small inductors or small electrolytic capacitors are generally more expensive. Using multilayer circuit board can reduce the volume, but generally speaking, it will increase the overall cost. As mentioned above, some system design engineers may deliberately increase the switching frequency to reduce the size of components, but increasing the switching frequency will increase the power loss. If there is no need to reduce the circuit board, it will not only increase the cost, but also reduce the power loss to an unnecessarily low level.

System cost to provide the most cost-effective power supply for FPGA chip has always been the direction of system design engineers, but reducing the power supply cost as far as possible does not mean using the cheapest voltage regulator. For example, system design engineers often refuse to use voltage regulators with built-in MOSFETs because they are more expensive. However, in some applications, such voltage regulators are more cost-effective than those with external MOSFETs. In addition, voltage regulators with external field effect transistors are more susceptible to noise from the circuit board. The simple design and high integration switching regulator with built-in metal oxide semiconductor field effect transistor is not easy to be affected by noise, which solves most of the noise problems caused by high sensitivity. In addition, we should give up the idea of using dual channel buck converter to replace two single channel switching converters. Because there is no need to use multiple input capacitors, the cost can be greatly reduced, and because the two phases can be operated out of phase according to the design, the root mean square (RMS) ripple current of the input capacitor can be greatly reduced. The use of dual phase controller can avoid the occurrence of beat frequency. If multiple asynchronous switching regulators are used and they operate at slightly different frequencies, beat frequency will be generated. Let’s not forget that the real cost is the cost listed in the system BOM, not just the cost of individual components. In addition to these requirements, the system using FPGA may also meet any one or more of the following special requirements: transient response the core voltage of FPGA chip will produce very high conversion rate current. Therefore, on the one hand, the controller must provide a large step load current, and on the other hand, it must minimize the disturbance of the output voltage. The ability of the controller to respond to these loads is also called transient response. Once the transient response, output capacitance and effective series resistance are determined, the operating bandwidth will be limited to a certain range.

When the sequencing and tracking system starts up, it may need to start one power supply first, and then start other power supplies one after another. If the power supply is not started in the specified order, the power supply will be “locked”, and the FPGA chip may be damaged or unable to perform normal functions. Some FPGA chips must have sorting and / or tracking function between input / output and core voltage. (for a variety of different sorting and tracking system designs, see Figure 3.) If the voltage regulator has been equipped with functions such as power good, enable, soft start and tracking, the sorting and tracking functions can be easily added, or these two functions can be added at any time in the future to make the design more flexible. If these two functions are not available, an external circuit should be added to ensure that the power supply can be started in the correct order.

To set the voltage rise rate for FPGA chip, we can use the soft start capacitor to set it. In addition, the rising voltage at start-up must be monotonous rather than decreasing. If the output capacitance of the power supply is small, the starting voltage will be affected and fall. A capacitor with enough capacity can store enough charge to provide transient voltage for FPGA chip. Synchronous operation the function of synchronous operation is to ensure that two or more regulators can be locked at a certain frequency together to avoid beat frequency. Without this synchronous operation function, the system will appear beat frequency phenomenon.


Because different systems have different requirements, and FPGA chips or special application integrated circuits have different degrees of complex design, and the utilization rate is not the same, so the configuration of power supply must make different arrangements according to different requirements. In addition to the input voltage, output voltage and output current, we also need to consider other special requirements, such as sequencing, tracking and starting conditions. In addition, we need to consider the impact of power consumption, volume and cost when designing the system.

Leave a Reply

Your email address will not be published. Required fields are marked *