Tps73xx device is a member of family low dropout (LDO) voltage regulator. They are differentiated from the LDO of tps71xx and tps72xx through their integrated microprocessor delayed reset function. Tps71xx and tps72xx should be considered if precision delayed reset is not required.The reset output of the tps73xx starts to reset in the under voltage state in the microcomputer and microprocessor system. An internal comparator at the tps73xx monitors the output voltage of the regulator to detect an undervoltage condition at the regulated output voltage.

If this happens, the reset output (open drain NMOS) is on, and the reset signal is low. Reset is to keep the duration of undervoltage low. Once the undervoltage condition stops, a 200 millisecond (typical) timeout starts. After a delay of 200 ms, reset is higher. The order of voltage difference and quiescent current decreasing compared with conventional LDO is to replace typical PNP transfer transistors with PMOS devices.

Due to the low resistance value of PMOS device, the voltage difference is very low (the maximum output current for TPS7350 is 35mV at 100mA), and is proportional to the output current (see Figure 1). In addition, since the PMOS transfer element is a voltage driven device, the quiescent current is low and remains constant, independent of the output load (typically 340 μ a for the entire range of output current, 0 Ma for 500 mA). These two key indicators produce a significant improvement in the operating life of battery powered systems.

The LDO series also has sleep mode; applying logic high signal to en (enable) turn off regulation reduces quiescent current to 0.5 microampere at t Ĵ = 25 ° C maximum.

The tps73xx is available in 2.5-V, 3-V, 3.3-V, 4.85-v, and 5-V fixed voltage versions and in adjustable versions (programmable 1.2V to 9.75v range). The output voltage tolerance is specified as 2% of the maximum through line, load and temperature range (3%, 2.5V and adjustable version). The tps73xx family is packaged in PDIP (8-pin), so (8-pin) and tssop (20 pin). The tssop has a maximum height of 1.2mm.

Performance characteristics and function analysis of LDO voltage regulator tps73xx

characteristic:

Available in 2.5-V, 3-V, 3.3-V, 4.85-v, and 5-V fixed output and adjustable versions

The integrated precision power voltage monitor monitors the output voltage of voltage regulator

Low level effective reset signal and 200 ms pulse width

Very low differential pressure.. . in my 35mV maximum diameter: = 100mA (TPS7350)

Low quiescent current load independent.. .。。 340 μ a typical value

Very low sleep state current, 0.5 μ a max

2% tolerance over the entire load, line full range, and temperature fixed output versions

0 Ma 500 mA range of output current

Tssop package option information reduces component height for critical applications

The tps7325 has a tolerance of ± 3% over the entire temperature range.The tps71xx and tps72xx are 500mA and 250mA output regulators, respectively, providing performance similar to tps73xx without delayed reset function. The tps72xx device is further thinned and shrunk through the availability of 8 pins for application profile packaging (tssop) that requires a minimum package size.

Editor in charge: GT

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