With the increasing integration of vision based computing intensive systems at the edge of the network, field programmable gate array (FPGA) is rapidly becoming the preferred flexible platform for the next generation design. In addition to requiring high bandwidth processing capacity, these intelligent systems are also deployed in small-scale environments with strict restrictions on heat dissipation and power. In order to improve the design speed of developers, microchip today announced the launch of an intelligent embedded vision project through its subsidiary MICROSEMI Corporation, which uses microchip’s low-power polarfire ® FPGA provides a solution for the design of intelligent machine vision system. The newly launched intelligent embedded vision solution adds a new enhanced high-speed imaging interface, an intellectual property (IP) package for image processing, and a larger partner ecosystem, further enriching the microchip high-resolution intelligent embedded vision FPGA product portfolio.

Microchip launches a new low-power FPGA intelligent embedded vision project solution

The intelligent embedded vision project provides a series of FPGA products including IP, hardware and tools, which can be applied to low-power small machine vision design in industries such as industry, medical treatment, radio and television, automobile, aerospace and national defense. With the implementation of the project, microchip has launched the following products to further meet the design requirements of intelligent vision system:

·Serial digital interface (SDI) IP – used to transmit uncompressed video data stream through coaxial cable. The interface supports the following speeds: HD-SDI (1.485 Gbps, 720p, 1080i), 3g-sdi (2.970 Gbps, 1080p60), 6g-sdi (5.94 Gbps, 2kp30) and 12g-sdi (11.88gbps, 2kp60).

·Mipi-csi-2 IP of 1.5 Gbps per channel – mipi-csi-2 is a sensor interface connecting an image sensor to an FPGA, which is usually used for industrial cameras. Polarfire series products support a receive rate of up to 1.5 Gbps and a send rate of up to 1 Gbps per channel.

·Slvs EC RX of 2.3 Gbps per channel – slvs EC Rx is the image sensor interface IP that supports high-resolution cameras. Customers can choose dual channel or eight channel slvs EC RX FPGA core.

·Multi rate Gigabit Mac – polarfire series products can support 1, 2.5, 5 and 10 Gbps transmission rates through Ethernet PHY, and can meet the requirements of universal serial 10 Ge media independent interface (usxgmii) through automatic negotiation.

·6.25 Gbps coaxpress v1.1 host and device IP – coaxpress is the standard for high-performance machine vision, medical and industrial testing. According to the industry’s standard roadmap, microchip will support coaxpress V2.0, which doubles the bandwidth to 12.5 Gbps.

·HDMI 2.0B – the HDMI IP core currently supports a resolution of up to 4K at a transmission rate of 60 FPS; Supports up to 1080p resolution at 60 FPS reception rate.

·Polarfire FPGA imaging IP package – with mipi-csi-2 function, it contains image processing IP for edge detection, alpha mixing and image enhancement for color, brightness and contrast adjustment.

·Larger partner ecosystem – Kaya instruments will join the microchip partner ecosystem, a vendor that provides polarfire FPGA IP cores for coaxpress v2.0 and 10 GigE vision. The microchip ecosystem also includes Alma technology, BITEC and artificial intelligence partner ASIC design services, which provides a core deep learning (CDL) framework to provide an energy-efficient convolutional neural network (CNN) – based imaging and video platform for embedded and edge computing applications.

Shakeel peera, vice president of product marketing, MICROSEMI FPGA business department, a subsidiary of microchip, said: “Working with our partner ecosystem to provide a complete set of IP and hardware products is very important to help customers improve their innovation ability while meeting production plans. The increasing popularity of artificial intelligence and the popularity of edge vision system promote the rapid development of machine and computer vision. In this context, the launch of this product is particularly important.”

Compared with the mid-range FPGA of static random access memory (SRAM), the total power consumption of polarfire FPGA can be reduced by 30% to 50%. The same range of products includes logic elements (LES) ranging from 100k to 500K. Their static power consumption can be reduced by 5 to 10 times, making them ideal for a range of computing intensive edge devices, including those deployed in heating and power limited environments.

development tool

In addition to the new high-speed imaging IP core and polarfire imaging IP package, the company also provides a new machine learning camera reference design based on mipi-csi2, which can be used for the deployment of intelligent embedded systems. The reference design is based on polarfire FPGA imaging and video toolkit using microchip partner ASIC design services reasoning algorithm, which is available to customers for free for evaluation. Libero, a comprehensive development tool of microchip ® SoC Design Suite supports all intelligent embedded vision solutions.

Supply and pricing

Via libero ® SoC Design Suite, all IP can be implemented on polarfire FPGA video and imaging toolkit, an intelligent embedded visual design evaluation platform. The following IP cores are available today:

·HD-SDI(1.485 Gbps、720p、1080i)

·3G-SDI(2.970Gbps、1080p60)

·MIPI-CSI-2

·Dual channel slvs EC RX FPGA core

·6.25 Gbps CoaXPress v1.1

·HDMI 2.0 4K resolution and 1080p resolution (when both transmission and reception speeds are 60 FPS)

The following IP cores will be gradually supplied by the end of 2019:

·6G-SDI(5.94 Gbps、2Kp30)

·12G-SDI(11.88 Gbps、2Kp60)

·USXGMII MAC

·Eight channel slvs EC RX FPGA core

·6.25 Gbps CoaXPress v2.0

·HDMI 2.0 4K resolution (at 60 FPS reception rate)

The polarfire imaging IP package costs $1499 and the mpf300 video kit costs $999.

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