Over the years, the industry has developed a variety of mature technologies for transmitting signals on the backplane bus. With the continuous growth of Telecom and data communication services and the continuous improvement of data transmission speed, the limitations of some traditional single ended and emitter coupled logic technologies are becoming more and more obvious. Multipoint low voltage differential signal (m-lvds) is an interface standard similar to LVDS. It can bring high-speed, low-power and low EMI transmission solutions for today’s bus applications. It is very suitable for data, control, synchronization and clock signals.

On the current backplane, the high-speed signals carrying net load data generally go through point-to-point (a driver and a receiver) interfaces, which are connected with various kernel chips, such as ASIC, FPGA, DSP, etc. Properly terminated point-to-point interfaces can provide the best performance for high-speed signals. The signal levels they use can be PECL, CML, VML and LVDS, and the speed can be more than 4gbps.


 

The termination method of LVDS is very simple. Only one termination resistor needs to be placed at the receiver end. LVDS can also handle multi branch signal transmission, that is, one driver and multiple receivers share the same differential transmission line. M-lvds is an extension of LVDS, which allows multiple drives to share the same half duplex bus.

LVDS (TIA / eia-644a) is a famous interface standard for point-to-point and multi branch applications, which can be regarded as the speed upgrade of RS-422. M-lvds (TIA / eia-899) further extends the advantages of LVDS (high speed, low power consumption, low EMI, simple termination and industrial standard) to bus applications. It can be regarded as a speed upgrade of RS-485 for general telecommunication applications transmitted through backplane (FR-4 material) routing or cable. M-lvds can provide excellent signal integrity, heat exchange and built-in fault protection support.

The driver output current of LVDS is 3.5ma, and the driver output current of m-lvds is 3 times that of m-lvds, up to 11.3ma, and reduces the input voltage threshold from 100mV to 50mV, so it can provide better signal integrity. For multi-point applications that tend to be standardized, placing 100 Ω termination resistors at both ends of the bus can form an effective 50 Ω impedance, and the signal voltage swing can reach 565mv, compared with the typical LVDS swing of only 350mV. For point-to-point cable applications, the current IC output stage circuit can still provide sufficient current on a single 100 Ω terminal and produce a voltage swing of 900mv to 1000mV, which exceeds the LVPECL level of 800mv.

M-lvds chip can be used for clock and synchronization signal distribution with speed up to 125MHz, as well as data and control signals with speed up to 250mbps.

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