What is DRAM?

Memory is the basis of computer operation. When combined with CPU, it can run instruction set (program) and store working data. Random access memory (RAM) is a well-known memory type because it can access any location in memory with approximately the same time delay. Dynamic random access memory (DRAM) is a specific type of random access memory, which allows a higher density at a lower cost. The memory modules in laptops and desktops use DRAM.


Other types of memory, such as SRAM, MRAM and flash. In short, DRAM stands for dynamic random access memory and SRAM stands for static random access memory. The biggest difference is that DRAM uses capacitors, while SRAM does not, although there are still some considerations, such as different processing, different speeds, and different costs for developers.

Working principle of DRAM

DRAM was invented by Robert dennard at IBM in 1966. Its working principle is very different from other types of memory. The basic memory cell in DRAM consists of two components: transistor and capacitor. When a bit needs to be put into memory, the transistor is used to charge or discharge the capacitor. The charging capacitor indicates logic high or “1”, while the discharging capacitor indicates logic low or “0”. Charging / discharging is accomplished by word line and bit line, as shown in Figure 1.

Introduction of dynamic random access memory

Figure 1. In DRAM, bits are stored as whether there is charge on the capacitor

During reading or writing, the word line becomes high and the transistor connects the capacitor to the bit line. Any value (“1” or “0”) on the bit line is stored or retrieved from the capacitor. The charge stored on each capacitor is too small to be read directly and is measured by a circuit called a sense amplifier. The sensor amplifier detects the small charge difference and outputs the corresponding logic level. The action of reading from the bit line forces the charge out of the capacitor. Therefore, in DRAM, reading is destructive. In order to solve this problem, we need to carry out an operation called precharge, which puts the value read from the bit line back into the capacitor.

The same problem is that over time, the capacitor leaks charge. Therefore, in order to keep the data stored in memory, the capacitor must be refreshed regularly. Refreshing is like reading, ensuring that data is never lost. This is where DRAM gets the “dynamic” name from the charge on the DRAM cell, and it will refresh dynamically at intervals. Compared with SRAM (static RAM), the latter can keep its state without refreshing.

DRAM organization

According to the application, DRAM can have different forms. Figure 2 shows a DIMM (dual in-line memory module) with multiple on-board DRAM chips.

Introduction of dynamic random access memory

Figure 2. 1GB DIMM with many DRAM chips

This DIMM contains 1 GB of memory, but please note that “2rx8” is printed on the sticker. 2R indicates that the rank of the module is 2, while X8 (read as “8”) indicates the output width of the data from each DRAM chip. A rank is a group of drams that can be individually addressed. In this case, a rank is a set of four DRAM chips. Since there are 8 (front / back), there are 2 ranks. The rank of DRAM module is the highest level of organization in DIMM. Under this, each chip is organized into many memory banks and memory arrays containing rows and columns. Figure 3 shows a DRAM chip with four memories.

Introduction of dynamic random access memory

Figure 3. DRAM chip with four memories

Each bank runs independently. This means that reading, writing and precharging can be done in one bank without affecting the other.


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