A programmable filter is designed with MCU and FPGA as the control core to realize the functions of small signal programmable amplification, programmable adjustment of filter cut-off frequency and amplitude frequency characteristic test. The amplifier module is realized by the variable gain amplifier AD603, the maximum gain is 60dB, the 10dB step is adjustable, and the gain error is less than 1%. The programmable filter module consists of max297 low-pass filter, tlc1068 high pass filter and elliptic low-pass filter. The filter mode is selected by analog switch. The – 3dB cut-off frequency of the active filter is adjusted by the program in the range of 1 ~ 30kHz, and the error is less than 1.5%. In addition, the RMS sampling chip AD637 and 12 bit parallel a / D converter Max120 are used to measure the sweep signal amplitude.

Filter is a kind of device used to eliminate interference and noise, which can be used to effectively filter the frequency point of a specific frequency or other frequencies. It plays a very important role in the field of electronics, and has been widely used in signal processing, anti-interference processing, power system, anti aliasing processing. For the programmable filter, the biggest feature of the system is that the filtering mode can be selected by program control, and the – 3 dB cut-off frequency can be adjusted by program control, which is equivalent to a multifunctional filter, and will have a better application prospect. In addition, the system has the function of amplitude frequency characteristic test, and displays the spectrum characteristic through the oscilloscope, which can directly reflect the filtering effect.

  Amplification module

Interpreting FPGA to design programmable filter system circuit

The specific circuit of the amplifier module is shown in Figure 2. The first part is a voltage dividing network, in which the first four resistors attenuate the input signal by 100 times, and form a 51 Ω impedance together with the internal resistance of the signal source, and the latter 51 Ω is the matching resistance. In the second part, opa690 is used to amplify the small signal by two times, which can transform the impedance and isolate the signal. Since the input impedance of AD603 is 100 Ω, a 100 Ω resistor is connected in series to match. The third part is AD603 variable gain amplifier, whose gain increases linearly in dB with the increase of control voltage. The reference voltage of pin 1 is calculated by single chip microcomputer and controlled by the output voltage of DAC chip, so as to achieve accurate numerical control. Gain G (DB) = 40vg + G0, where VG is the differential input voltage and the range is – 500 ~ 500mv; G0 is the starting point of gain, which is different when connected to different feedback networks. In 5, 7 pin indirect a 5K Ω potentiometer, thus changing.

  High pass filter module

LTC1068 is a low noise and high precision universal filter. When it is used in high pass filter, the cut-off frequency range is 1 Hz ~ 50 kHz, and there is no aliasing up to 200 times of the cut-off frequency. Because the four channels of LTC1068 are low-noise, high-precision and high-performance second-order filters, each channel can realize the functions of low-pass, high pass, band-pass and band stop filters as long as several resistors are connected. The specific circuit is shown in Figure 3. The Q value of port B is 0.57, and that of port a is about 1. In the debugging of the circuit, it is found that the Q value of port a should be larger than that of port B, otherwise the signal amplitude will be warped at the cut-off frequency.

Interpreting FPGA to design programmable filter system circuit

The ratio of clock frequency to passband of LTC1068 is 200:1. Because LTC1068 has double frequency of clock signal CLK, when the cut-off frequency is at least 1 kHz, the internal clock frequency is actually 400 kHz. Therefore, a low-pass filter with cut-off frequency of 450 kHz is added after LTC1068 to filter the noise and high-order harmonics caused by frequency division.

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