Author: ADI company   Jon Kraft, Senior Field Application Engineer      Alex ilustrisimo, application engineer

brief introduction

The first part of this series introduces a unique method of generating low-noise negative power rail from positive power supply, and explains the derivation process of equation to control its operation. In the second part, with the help of ADI’s new product adp5600, we will deeply explore the practical example of this interleaved inverse charge pump (IICP). We compare the voltage ripple and EMI of adp5600 with the standard charge pump to reveal how interleaving can improve the low noise performance. We also apply it to the low noise phased array beamforming circuit, and use the formula in the first part to optimize the performance of the solution.

The world’s first commercial staggered reverse phase charge pump

As described in the first part, IICP is used in integrated circuits to generate smaller negative bias tracks. Adp5600 uniquely combines low noise IICP with other low noise features and advanced fault protection functions.

Adp5600 is an interleaved charge pump inverter with low dropout (LDO) linear regulator. Compared with the traditional solution based on inductor or capacitor, its unique charge pump stage has lower output voltage ripple and reflected input current noise. Interleaving as a low noise concept is very clever, but interleaving channel can not solve all the noise problems. In order to achieve true low noise, a specially designed IC is needed to realize the low noise advantage of IICP while maintaining the small size and high efficiency of the solution.

Fixed and programmable switching frequency

Many reverse phase charge pumps operate at several hundred kHz. This relatively low frequency limit requires a relatively large capacitance and limits where the frequency spurious can be placed. The adp5600 can operate at switching frequencies from 100 kHz to 1.1 MHz, so it can be used efficiently in modern systems. In addition, the frequency is always fixed and does not change with the output load. Switching frequency variation (spread spectrum modulation) is usually used to improve charge pump efficiency, but it may cause problems in noise sensitive systems.

External frequency synchronization

Many low noise systems need to place high amplitude switching noise in the specified frequency band to minimize the impact of the generated noise on the system. Considering this, in noise sensitive system, the working frequency of the converter is synchronous, but in charge pump inverter, synchronization is rare. In contrast, the adp5600 can be synchronized to an external clock of up to 2.2 MHz.

Low dropout regulator

The input voltage range of adp5600 is very wide, and its charge pump output voltage may be too high to supply power for low voltage circuit. Therefore, the adp5600 has a built-in LDO post regulator. It also has a power supply normal signal pin based on positive voltage, so that it can easily control the power timing when the LDO output is in the steady state.

Fault protection

Finally, adp5600 has a comprehensive set of fault protection features, which is suitable for robust applications. Protection features include overload protection, short circuit flying capacitor protection, under voltage locking (UVLO), precision enable and thermal shutdown. Another novel characteristic is the current limiting of flyover capacitor, which can also reduce the peak current when the flyover capacitor is charged.

Adp5600 test data

The first part theoretically proves that IICP architecture can significantly improve ripple compared with non interleaving solution. For brevity, the derivation described in the first part is idealized, ignoring parasitic effects, layout dependence (IC and PCB), timing mismatch (i.e. imperfect 50% oscillator) and RDS mismatch. These factors lead to some deviation from the calculated and measured voltage ripple. As always, it is best to put adp5600 into use, observe its performance, and use the derived equations to guide circuit optimization to obtain the best performance.

The standard adp5600 evaluation board is used here, but rfly is inserted, and the values of cfly and cout are modified. In addition, we use the sync feature of adp5600 to change the switching frequency. The block diagram shown in Fig. 1 shows that each charge pump switches at half of the sync frequency. In other words, FOSC  = ½ fSYNC。

Figures 3 and 4 show the output voltage ripple of interleaved and non interleaved charge pumps under the same operation conditions.

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Figure 1. Simplified block diagram of adp5600 interleaved reverse phase charge pump.


Figure 2. Adp5600 interleaved reverse phase charge pump test setup.

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Figure 3. Adp5600 IICP output voltage, Vin  = 6 V,COUT  = CFLY  = two point two μ F,fOSC  = 250 kHz,ILOAD  = 50 mA


Figure 4. Standard inverse charge pump output voltage, Vin  = 6 V,COUT  = CFLY  = two point two μ F,fOSC  = 250 kHz,ILOAD  = 50 mA

Under these conditions, the input and output voltage ripple of adp5600 is almost 14 times lower than that of traditional charge pump. We can also determine if the voltage ripple is consistent with the equation derived in the first part of this series. Reviewing the first part, the output (or input) voltage ripple of IICP is given by the following formula:

poYBAGDZcaiAVKdDAABtWarD_ e0299.png


Where f is FOSC, R is Ron and C is cfly

By using equation 1 and substituting the actual value into rout and Ron, the calculated and measured output voltage ripple can be compared. Table 1 shows the results under various test configurations, and points out the improvement range compared with the non interleaved charge pump scheme.

Table 1. V under different use casesOUTRipple; VIN= 12 V,ILOAD= 50 mA,RON= 2.35 Ω*

fOSC  ( kHz) COUT  (μ F) CFLY  (μ F) RFLY  ( Ω) Measured Vout  ( V) Measured route  ( Ω) Vout ripple (MV) Compared with non interleaving
Actual measurement calculation
two hundred and fifty one point six one point six 0 eleven point four eight ten five point three six twelve ×
two hundred and fifty one point eight one point eight twenty-five eight point eight six sixty-three three point four three point two eighteen ×
two hundred and fifty four point six one point six 0 eleven point four eight ten one point nine two point four twelve ×
five hundred two point eight one point six 0 eleven point four five eleven two point five two point nine seven point five ×
five hundred one point eight one point eight twenty-five eight point seven four sixty-five three point one two point seven ten ×
one thousand one point six one point six 0 eleven point four zero twelve four point three four point two three point seven ×
one thousand one point eight one point eight twenty-five eight point four three eight seventy-one two point eight two point eight five point six ×

*The actual capacitance values of cout and cfly (capacitance will be derated under voltage) are used instead of the nominal values.

Table 1 shows that the interleaved voltage ripple is in good agreement with the prediction of equation 1. In addition, it shows the improvement compared with the standard non interleaved charge pump. Some of the settings in this table also include an additional external resistor rfly in series with cfly. The results show that rfly further reduces the voltage ripple at the expense of the charge pump output resistance. Equation 1 and the analysis in the first part of this series also predict this.

In addition to the output voltage ripple, the electromagnetic radiation disturbance of IICP is also improved compared with the standard charge pump. To measure this, a 25 mm antenna was placed on the evaluation board (Figure 5) and several configurations were tested. Figure 6 shows a comparison of such a configuration with a standard non interleaved charge pump inverter. The IICP topology can reduce the noise of the first and third switching harmonics by 12 dB to 15 dB.



Figure 5. EMI test setup using adp5600 evaluation board



Figure 6. EMI, Vin  = 12 V,ILOAD  = 50 mA,CFLY  = COUT  = two point two μ F,fSYNC  = 500 kHz。 Green = standard, blue = IICP.

IICP application example

Data converter, RF amplifier and RF switch need low noise power supply. The main challenges of power supply design in these systems are as follows:

►   Power consumption and high temperature operation

►   EMI immunity and low EMI contribution

►   Wide input voltage range

►   Solution size and area should be minimized

To illustrate the complete design and advantages of IICP, we consider an application that supplies power to RF amplifiers, RF switches and phased array beamformer. The application is included in the adtr1107 data book, from which figure 7 is copied. This example requires several high power positive voltage rails – here is the work of the inductive buck converter. In addition, two negative voltage rails are required: avdd1 and VSS_ SW。 Adar1000 uses avdd1 as VGg_ PA and LNA_ Bias generates a low noise bias track. Avdd1 is – 5 V, 50 Ma, VSS_ SW is – 3.3 V, < 100 V of RF switch in adtr1107 μ A power rail. Each adar1000 uses four adtr1107, so the – 3.3? “” V power rail draws a maximum current of 1? “” Ma. Generally, the power rail of these systems is 12 > > > 100 >

The adp5600 is ideal for generating – 5 V, 50 Ma and – 3.3 V, 1 Ma power rails from 12 V because of its low input and output voltage ripple and low EMI. In addition, it can synchronize a wide range of switching frequencies, thus allowing the switching noise to be placed in the position with minimal impact on the system. Figure 8 shows the final design.


Figure 7. Adar1000 plus four adtr1107 power rails



Figure 8. Adp5600 and lt3093 are used for avdd1 and VSS_ SW power supply

The lt3093 is an ultra low noise LDO linear regulator that supports high voltage and allows the adp5600 charge pump output (cpout) to be connected directly to its input. The – 5 V output is set by the resistance on the set pin. When the avdd1 power rail meets the requirements, the programmable power good pin can inform other systems. Adp5600’s LDO regulates the current much lower than VSS_ SW rail. Although not as low as lt3093 noise or as high as PSRR, it can be used for VSS_ SW provides stable power rail. All three rails (charge pump, avdd1 and VSS)_ The output voltage ripple of SW is shown in Figure 9.

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Figure 9. Charge pump output voltage ripple, Vin  = 12 V,COUT  = ten μ F (nominal), cfly  = two point two μ F (nominal), fsync  = 1 MHz (fOSC  = 500 kHz),ILOAD  = 50 mA


This series consists of two parts. A new method of generating low noise negative power rail from positive power supply is proposed. The first part introduces the concept behind the operation of interleaved charge pump. The second part puts these ideas into practice, builds and tests a complete solution using ADI’s new product adp5600, and optimizes the solution using the mathematical model derived in the first part. In addition, the conducted emission and electromagnetic radiation interference are compared with those of the standard inverse charge pump. In some cases, compared with the standard charge pump inverter, the improvement can reach 18 times, which is very important to meet the low noise requirements of modern precision and RF systems.

About the author

Jon Kraft is a senior field application engineer based in Colorado and has been with ADI for 13 years. He focuses on Software Defined Radio and aerospace phased array radar applications. He holds a bachelor’s degree in electronic engineering from rothhausman Institute of technology and a master’s degree in electronic engineering from Arizona State University. He has nine patents (six related to ADI) and one in the pipeline.

Alexander ilustrisimo graduated from the University of central Philippines with a bachelor’s degree in electronic engineering. He joined ADI in 2014 and has been an application engineer of power management products for more than 6 years, focusing on LDO regulator and switching regulator.

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