On November 6, 2019, Intel released the world’s largest FPGA — Stratix 10 GX 10 m FPGA in the FPGA technology day (iftd 19). This product is the highest density (computing power) FPGA in the world. It is understood that this product has been mass produced at present. 21IC China electronic network reporter was invited to participate in the release of this product. Patrick Dorsey, vice president of Intel’s network and custom logic business division and general manager of FPGA power product marketing, answered the reporter’s questions on the spot.
The data shows that China’s total data volume will already have 7.6 ZB in 2018. By 2025, China’s total data volume will jump to 48.6 ZB, and the global total data volume will reach 125 ZB. It can be said that 1.5 GB of data volume will be generated every day in 2020. Previously, Intel also announced that it aimed at a potential market of 300 billion yuan or more with data as its center, especially in the field of FPGA. According to statistics, by 2022, the market size of FPGA will reach US $7.5 billion, with an annual compound growth rate of 9%. It is predicted that the Chinese market will be the fastest growing FPGA market.
On the one hand, the growth of 5g and 6G application market is from the data center end to the edge end of the network acceleration, to achieve faster data transmission, which requires technology optimization and innovation. Because FPGA has strong flexibility, it can enable technology innovation acceleration; on the other hand, it is AI application market, which is expected to have 20 billion US dollars by 2022, and FPGA can even account for 5% – 10% of them; on the other hand, smart city and smart factory need a lot of video analysis and processing work.
The breakthrough of this leap is mainly due to Intel’s EMI B chiplet (embedded multi chip interconnection and bridging) packaging technology to achieve single packaging of multiple chips, and to achieve rapid new product launch. It is worth mentioning that this new product is the first Intel FPGA that uses the EMI technology and combines two FPGA logic chips in logic and electrical.
In innovative applications, this product is mainly used in the next generation of 5g, AI, network ASIC Verification, enabling ASIC prototype design and simulation. This product has its own unique scalability, flexibility and efficiency in FPGA, and it is worth mentioning that since it is so outstanding in performance, which is better or worse than ASIC? The discussion of FPGA and ASIC in the industry has never stopped. Although they have different characteristics, there are frequent rumors that one will completely replace the other.
Before that, in terms of the competition between FPGA and ASIC, Henrik Lilja, President of silicon Denmark, made it clear that at this stage, programmable FPGA is very important for the implementation and acceleration of the most demanding algorithms. Until the algorithm has been very mature and finally established, ASIC can be used to implement these hardware algorithms, especially 5g and aiot, which are emerging at a high speed. In other words, in fact, FPGA and ASIC play different “roles”, and FPGA is the most suitable choice.
At present, Intel has a number of easic products, including easic n3xs, easic n3x / N2X and easicopy devices. Among them, the latest generation of products has up to 52 million equivalent ASIC gates, 124 MB dual port memory and transceivers with data rate up to 28 Gbps, helping customers quickly deploy customized devices dominated by logic, DSP or io.
As the world enters the era of data-centric, the computing power required for the diversity of massive data is different, including the crucial heterogeneous computing. The future computing model will be a combination of scalar, vector, matrix and spatial architecture, which can be deployed on CPU, GPU, AI, FPGA and many other different accelerators. Specifically, there are multiple challenges in programming: a variety of data centric hardware, a lack of a common programming language or API, inconsistent cross platform tool support, and a separate software investment for each platform.
Xue Hua further elaborated the core concept of Intel oneapi, “oneapi aims to provide a unified programming model to simplify the development of different architectures.” Under the support of excellent native high-level language performance and based on industry standards and open specifications, oneapi brings developers higher productivity and uncompromising performance. More importantly, thanks to the new DPC + + language, Intel FPGA development and acceleration based on oneapi become easier.
Generally speaking, the biggest challenge is the construction of FPGA ecosystem. Patrick said that Intel focuses on the development of more FPGA platform level, building more software stack, and more mainboard development, trying to create some new market opportunities for FPGA. This requires that FPGA has more ability to adapt to more new application scenarios, which means that it needs to cooperate with more system integrators and value-added service channel providers to promote the development of FPGA together.
Specifically, David Moore, vice president of Intel Network and custom logic and general manager of FPGA and power products, said that Intel FPGA has advanced multi-function accelerator support, and its excellent flexibility can help customers create highly differentiated products. At the same time, its excellent hardware programmability can meet the changing market requirements and standards. Based on FPGA, Intel has built a complete system, including Ia + FPGA solutions, partners and ecosystems, software and IP, as well as chips and motherboards, covering from edge computing to cloud to network and other fields.
Previously, 21IC China electronic network also introduced Intel’s six technology pillars for the future, including security, software, interconnection, memory & storage, architecture, process & packaging. In terms of FPGA construction, Intel will also make full use of the advantages of ecology and IDM manufacturers to continuously promote cooperation and promote the development of FPGA and ASIC.