1Introduction to UART
UART (Universal Asynchronous Receiver/Transmitter, Universal Asynchronous Receiver/Transmitter) is a bidirectional, serial, asynchronous communication bus, which can realize full-duplex communication with only one data receiving line and one data transmitting line.
Typical serial communication is done with 3 wires, namely: sending wire (TX), receiving wire (RX) and ground wire (GND). During communication, the TX and RX of both parties must be cross-connected and GND connected to communicate normally. As shown below:
The UART interface does not use a clock signal to synchronize the transmitter and receiver devices, but transfers data asynchronously. Instead of the clock signal, the transmitter generates a bit stream based on its clock signal, and the receiver uses its internal clock signal to sample the incoming data.
The synchronization point is the same baud rate through both devices (UARTs, like most serial communications, the sending and receiving devices need to set the baud rate (the rate at which information is transmitted to the channel) to the same value. For serial ports, the set baud rate will be used as the maximum number of bits transferred per second).
If the baud rate is different, the timing of sending and receiving data may be affected, resulting in inconsistent data processing. The maximum allowable baud rate difference is 10%, beyond which the timing of the bits becomes out of order.
Here’s a summary of what you must know about UARTs:
|Number of wires||3 wires (TX, RX and GND)|
|speed||1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, etc.|
|transfer method||full duplex asynchronous|
|Maximum number of hosts||1|
|Maximum number of slaves||1|
3UART protocol frame
In UART, the transmission mode is in the form of packets. A data packet consists of start bits, data frames, parity bits and stop bits.
3.1, start bit
When not transmitting data, the UART data transmission lines typically remain at high voltage levels. To start a data transfer, the transmitting UART pulls the transmission line from high to low for 1 clock cycle.
When the receiving UART detects a high-to-low voltage transition, it begins reading bits in the data frame at a frequency corresponding to the baud rate.
3.2, data bits
The data frame contains the actual data transmitted. If parity bits are used, the data frame length can be 5 to 8 bits. If parity bits are not used, the data frame length can be 9 bits.
In most cases, data is sent least significant bit first.
3.3, parity bit
Parity describes whether a number is even or odd. Using the parity bit, the receiving UART determines whether any data has changed during the transfer. Electromagnetic radiation, inconsistent baud rates, or long-distance data transmission can all alter data bits.
The parity bit can be configured as 1 even parity or 1 odd parity or no parity bit.
Receive UART readData FrameAfter that, the bits with a value of 1 will be counted to check whether the total is even or odd. If the parity bit is 0 (even parity), the total of 1s or logical high bits in the data frame should be an even number. If the parity bit is 1 (odd parity), the total of 1s or logical high bits in the data frame should be an odd number.
When the parity bits match the data, the UART considers the transfer to be error-free. However, if the parity bit is 0 and the sum is odd, or if the parity bit is 1 and the sum is even, the UART thinks the bits in the data frame have changed.
3.4, stop bit
To signal the end of a packet, the sending UART drives the data line from a low voltage to a high voltage for 1 to 2 bit times.
4UART communication steps
Step 1: Data goes from the data bus to the transmitter.
Step 2: The sending UART adds start, parity and stop bits to the data frame.
Step 3: From the start bit to the end bit, the entire packet is sent serially from the transmitter to the receiver.
The receiving UART samples the data line at a preconfigured baud rate.
Step 4: The receiver discards the start, parity and stop bits in the data frame.
Step 5: The receiver converts the serial data back to parallel data and transfers it to the data bus on the receiving end.
Reviewing Editor: Tang Zihong