The signal line that needs to be impedance should be set in strict accordance with the line width and line distance calculated by lamination. For example, RF signal (conventional 50R control), important single ended 50R, differential 90r, differential 100r and other signal lines, the specific line width and line distance can be calculated through lamination (as shown in the figure below).
2. The design of line width and line distance should consider the production process capacity of the selected PCB manufacturer. If the line width and line distance set in the design exceeds the process capacity of the cooperating PCB manufacturer, the unnecessary production cost will be added, or the design will be unable to produce. Generally, under normal conditions, the line width and line spacing are controlled to 6 / 6 mil and the via is selected to be 12 mil (0.3 mm). More than 80% of the PCB manufacturers can produce it, and the production cost is the lowest. The minimum line width and line distance should be controlled to 4 / 4 mil, and the via should be 8 mil (0.2 mm). Basically, more than 70% of PCB manufacturers can produce, but the price is a little higher than that of the first case. The minimum line width and line distance should be controlled to 3.5 / 3.5 mil, and the via should be 8 mil (0.2 mm). At this time, some PCB manufacturers can’t produce it, and the price will be more expensive. The minimum line width and line distance should be controlled to 2 / 2 mil, and the via should be 4 mil (0.1 mm, which is usually HDI blind buried hole design and needs laser via). At this time, most PCB manufacturers can not produce, and the price is the most expensive. When setting the rule of line width and line distance, it refers to the size of line to hole, line to line, line to pad, line to via, hole to pad and other elements.
3. Consider the design bottleneck in the design file. If there is 1mm BGA chip with shallow pin depth, only one signal line needs to be used between two rows of pins, and 6 / 6mil can be set. If the pin depth is deep, and two signal lines need to be used between two rows of pins, it is set to 4 / 4mil; if there is 0.65mm BGA chip, it is generally set to 4 / 4mil; if there is 0.5mm BGA chip, the minimum line width and line spacing must be set to 3.5 / 3.5mil; if there is 0.4mm BGA chip, it is generally set to 4 / 4mil Need to do HDI design. Generally, for the design bottleneck, you can set regional rules (see the end of the article [AD software set room, Allegro software set regional rules]), set small points for local line width and line distance, and set larger rules for other parts of PCB, so as to facilitate production and improve the qualified rate of PCB.
4. It needs to be set according to the density of PCB design. If the density is small and the board is loose, the line width and line spacing can be set larger, and vice versa. General can be set according to the following steps:
1) 8 / 8mil, 12mil (0.3mm) via.
2) 6 / 6mil, 12mil (0.3mm) via.
3) 4 / 4 mil and 8 mil (0.2 mm) via.
4) 5 / 3. 5 mil, 8 mil (0. 2 mm) via.
5) 5 / 3. 5 mil, 4 mil (0. 1 mm, laser drilling) was selected.
6) 2 / 2mil, 4mil (0.1mm, laser drilling) was selected as the via.
Ad software sets room, Allegro software sets regional rules:
1) Baidu search: PCB alliance network, enter the alliance network interface
2) Enter “room” in the search box to jump to the post about room
3) Enter “regional rules” to jump to the posts related to regional rules