All this starts with fan7688 control IC. Since I learned this control method of “resonance current integration”, I have been considering how to realize LLC current mode control in digital control system. Needless to say, the advantages of current mode control are much better than voltage mode LLC in terms of audio immunity. In particular, we pay special attention to the ripple of output current in the application of on-board OBC. If, I say here, if I implement the current mode control method in the digital control environment, this is a very good application technology breakthrough.
Let’s take a look at how the traditional VMC (voltage mode control) is implemented. The following figure is a typical simulation implementation of VMC. Some of the pictures and words in the following are from this document: unitrod design note:switching power supply topology voltage mode vs. current mode by: Robert mammano 1994/10
There are several distinct advantages in VMC PWM conversion: the closed-loop control of single voltage loop is easy to design, the amplitude of PWM carrier is high, the stability of control circuit is good, and the output impedance is low, which is easy to optimize the cross adjustment of multiple power supplies. However, there are also several disadvantages: first, the feedback can only respond after the input or output load changes. Obviously, there is a time lag in the control, resulting in poor response. The turning frequency and phase change of the LC filter at the output side bring unstable influence. The loop gain changes with the input voltage range, which makes it difficult to design the compensation.
The voltage mode is extended to the control of LLC converter. Some shortcomings of the above PWM control also exist in LLC converter. Including the influence of low-frequency bipolar points and the lag in control, which lead to the current LLC converter of VMC is difficult to have a better dynamic response. Here, I send a frequency response test chart of output voltage in the frequency control of LLC converter controlled by l6599a. For more information, see section 5 (conclusion) of simulation comparison of LLC controllers of VMC and CMC.
It can be seen from Bode diagram that there are bipolar points and phase reduction of 180DEG at low frequency of 1.5khz, which reveals the similarities with VMC buck converter. Before the topic of VMC continues, I’ll take a look at the implementation of PCM (peak current control mode) in the common topology.
The figure above shows the theoretical implementation of PCM. This principle applies to UC3843 or LM3478 or newer analog controllers. From here, we can see that the output ve of the voltage loop determines the peak value of the triangular wave of the switching current, so the fast response to the change of the input voltage is realized. Because there is a relationship of ipk = vin*ton/l, the PCM naturally includes the feedforward of the input voltage. In addition, after the accurate current limitation of the inductance current, the inductance becomes a controllable current source subject to the duty cycle, thereby simplifying the transfer function from control to output, The influence of LC output filter is removed, and the system becomes a first-order inertial system, which is easier to control and stabilize.
However, PCM has current sampling effect, so that when the duty cycle is greater than 50%, it will enter the unstable area of large signal. In engineering, slope compensation is usually added to solve the problem of instability when the duty cycle is greater than 50%. The biggest advantage of current mode is to greatly improve the audio immunity and greatly reduce the AC input ripple in the output voltage, which is very attractive for LLC converters. Many engineering experiences and theories point out that the output power frequency ripple of LLC conversion of common VMC is large, which is a troublesome problem. Including our output ripple current in the OBC application, I am not surprised to pay attention to the current mode LLC controller and the implementation method of the current mode control behind it. Here, I can see the five articles on Modeling and Simulation of current mode LLC controllers written at the beginning of this year: simulation comparison of LLC controllers of VMC and CMC Section V (conclusion).
From several implementation methods of current mode control, the charge (power) flowing into the resonator can be limited in real time with the output of the voltage outer loop, and the system can be reduced to a single pole system. It can be seen that the following figure shows the frequency response from the frequency control of the LLC converter controlled by fan7688 to the output voltage:
It can be seen that under the same power level parameters, only changing to current mode control reduces the transfer function from the system frequency to the output. This waveform is exactly the result we expect. The gain and phase curves in the low frequency band are monotonous, so it is easy to make the system bandwidth. So the question is, can the current type LLC controller be implemented in the digital control system because its effect is so good?
This problem is the starting point of this paper. I have been thinking about how to realize the control of current source LLC in DSP or MCU. Considering the difficulty of implementation, I chose the charge integration control method of fan7688. This method has the beauty and elegant implementation of PCM in our imagination. Let’s take a brief look at the implementation of this control method. For more details, see my previous article: simulation comparison of LLC controllers of VMC and CMC, section 3
The following figure is the implementation basis of charge control. It gracefully integrates the current flowing into the resonant cavity to obtain a slope current similar to the inductance in PWM converter. By controlling the peak value of this charge integral, the current flowing into the resonant cavity can be controlled, and the power flowing into the transformer in each switching cycle can be controlled, thus realizing the peak current mode LLC converter control. Further, we can also consider that we only need to control the current flowing into the resonator during ton, and the time of ton can be copied during toff, which simplifies the control complexity. In a complete switching cycle, we only control the time of ton.
In the specific implementation of Analog IC, the peak value of charge integration is determined according to the output of the outer ring, and then ton is copied to toff to realize the symmetrical cycle length. When the toff count is completed, a new switching cycle is started. See the internal implementation of fan7688:
Therefore, this method is also used in the digital implementation. The charge integral triangular wave of the resonant current is taken by the transformer and input to the cmpss of DSP for the implementation of PCM. As can be seen from the figure below, this is the realization of current mode control in the digital system, and its idea comes from fan7688.
First, the voltage loop is output to the DAC to set the positive value of the comparator in the cmpss, then the ton starts, and the VICS starts to rise until it is higher than the value output by the DAC. Then, the cmpss outputs the digital comparator event dcxevty to the PWM module. The PWM module closes the ton according to this event, and then gives the on length of the ton to toff. When the toff ends, a new ton cycle begins. In this control method, it is necessary to consider that the value of charging current integral under light load is low, which is not easy to compare. Therefore, it can work in VMC mode. When the load current reaches a certain set value, it can be switched to current control mode. In fact, ucc260x40x is a hybrid control of current and voltage control modes. In this way, the system performance can be optimized by using their respective advantages.
In fact, we still have a problem that has not been well solved, that is, after cmpss outputs dcxevty signal to PWM module, we can easily configure it to turn off ton of CBC, but how to establish an equal relationship between toff and ton? This is the core problem of realizing digital current source controlled LLC converter. After discussing with TI’s senior FAE, I proposed such an implementation method:
The blue counter is the lowest switching frequency set, that is, the longest tbprd length.
The counter is set to up-down mode.
Ton is set from PRD to ZrO.
Toff is set to active dead zone complementation in AHC mode.
Let’s start to think about this working mode:
Ton, i.e. h, starts to generate waves, starts to pull up from the PRD point, and the PWM counter starts to drop from the PRD point.
Then wait for the resonant current to rise to the set point of the voltage loop, cmpss acts, and the black line marking points in the above figure can be seen.
Then, the digital comparator module (DC) in epwm acts to close the H output before reaching the ZrO point, that is, to end ton.
After the dead time, the drive L is pulled up by the dead time module and the toff time starts. At this time, configure the cmpss comparator output and enter the CBC interrupt service function. In addition, this ISR should be set to the highest priority to allow interruptions of other interrupts and other tasks. Read the value of count in this ISR. Considering the clock cycle interval from cmpss action to entering ISR, we can calculate where the time point of actually closing ton is in count, and then we can know the length of ton.
Then write this value into tbprd. Finally, execute the software forced PWM synchronization input again, and directly pull the value of count from not yet to ZrO to ZrO point. In this way, the new cycle is directly loaded into tbprd, and toff is closed when the count increases to PRD.
Then turn on ton, and continue to wait until the charging charge integral of the resonant current is greater than the set point of the DAC. In terms of control accuracy, there are two periods of time to be compensated. The first section is the time from CBC action to entering ISR, and the second section is the time from entering ISR to software forced PWM synchronization. The former will increase ton and the latter will increase toff, so some tests need to be carried out according to the actual situation to be accurate.
Summary: This paper presents a method to realize the current mode control of LLC converter in the digital control system, which mainly uses the ISR of CBC to read the value of count and force to refresh the PWM counting cycle. This method has not been tested and verified by the actual project. It is just an idea in my mind. Today, I will write it out and share it with you. If you are interested in this control implementation, you can continue to discuss it with me. Thank you.
1. Unitrod design note:switching power supply topology voltage modevs Current mode by:robert mammano 1994/10
2. Fan7688 data manual
My name is Yang Shuai. I have many years of experience in power supply hardware and software development. I am familiar with the use of various power supply simulation software, including PSPICE and Simplis in analog control direction, and MATLAB and pless in digital control. Familiar with the topology, control algorithm and loop design of PSFB, CLLC, DAB, PFC and other power architectures. At present, it is engaged in the vehicle power supply industry, focusing on the field of medium power converter. For several years, it has been engaged in the research, application and promotion of power electronics simulation technology.