Writing reason: because I have done research on STM32 priority before, but I have no time to publish the sorted things. Recently, the project needs two serial ports, but not two serial ports are used at the same time, just one of them is used randomly. The program needs to configure the priority of the two serial ports;

The idea of this paper: “interrupt priority” mind map — “key points –” combined with the diagram and key points related program application routine explanation;

Let’s take a look at a picture of ST company

How to configure the priority of STM32 interrupt

According to this picture, I use mind guide to draw a picture for easy understanding: (if you can’t see clearly, you can zoom in through Ctrl + mouse pulley;)

How to configure the priority of STM32 interrupt

Prerequisite 1: group priority (group 0 has the strongest priority, group 4 has the weakest priority): NVIC_ PriorityGroup_ 0》NVIC_ PriorityGroup_ 1》NVIC_ PriorityGroup_ 2》NVIC_ PriorityGroup_ 3》NVIC_ PriorityGroup_ four

Prerequisite 2: “group” priority “,” grab “priority” and “sub” priority

Precondition 3: in the same group of priorities, among different preemption levels, one preemption level is working, and the other preemption level cannot interrupt him( That is, there is no interrupt nesting among interrupt sources of the same priority group.)

Precondition 4: according to the priority of different groups, the interrupt source of the group with higher priority can interrupt what the group with lower priority is doing( That is, nesting can be interrupted between different group priorities.)

Below: we give a detailed analysis of the code of priority configuration to facilitate the above understanding

An example of “prerequisite one”:

Prerequisite 1: group priority (group 0 has the strongest priority, group 4 has the weakest priority): NVIC_ PriorityGroup_ 0》NVIC_ PriorityGroup_ 1》NVIC_ PriorityGroup_ 2》NVIC_ PriorityGroup_ 3》NVIC_ PriorityGroup_ four

/*

***************************************************************************************************

**

**NVIC_ Config()

**

**

**Function Description: interrupt vector configuration.

**

**Parameter: None

**

**Return value: None

**

***************************************************************************************************

*/

voidNVIC_ Config(void)

{

NVIC_ InitTypeDefNVIC_ InitStructure;

/*Configureonebitforpreemptionpriority——————————–*/

NVIC_ PriorityGroupConfig(NVIC_ PriorityGroup_ 4);

/*EXTI0——————————————————————–*/

NVIC_ InitStructure.NVIC_ IRQChannel=EXTI0_ IRQChannel;

NVIC_ InitStructure.NVIC_ IRQChannelPreemptionPriority=9;// Specify preemptive priority 4, take 0-15

NVIC_ InitStructure.NVIC_ IRQChannelSubPriority=0;

NVIC_ InitStructure.NVIC_ IRQChannelCmd=ENABLE;

NVIC_ Init(&NVIC_ InitStructure);

/*Configureonebitforpreemptionpriority——————————–*/

NVIC_ PriorityGroupConfig(NVIC_ PriorityGroup_ 3);

/*SPI1——————————————————————–*/

NVIC_ InitStructure.NVIC_ IRQChannel=SPI1_ IRQChannel;

NVIC_ InitStructure.NVIC_ IRQChannelPreemptionPriority=0;

NVIC_ InitStructure.NVIC_ IRQChannelSubPriority=0;

NVIC_ InitStructure.NVIC_ IRQChannelCmd=ENABLE;

NVIC_ Init(&NVIC_ InitStructure);

}

Analysis: 1_ PriorityGroup_ 4, it is divided into 16 preemption (priority) levels, and each preemption (priority) level has only one sub priority: 0;

According to NVIC_ PriorityGroup_ Three points, it is divided into eight preemption (priority) levels, each preemption (priority) level has only two sub priorities: 0-1;

2. (priority strength:) exti0_ Irqchannel is a high priority group of SPI Level 3 in level 0 group, which can interrupt low-class people who are doing things (nesting), so when SPI is working, exti0 can interrupt them to enter exti0 interrupt;

An example of “prerequisite 3”:

Precondition 3: in the same group of priorities, among different preemption levels, one preemption level is working, and the other preemption level cannot interrupt him( That is, there is no interrupt nesting among interrupt sources of the same priority group.)

/*

***************************************************************************************************

**

**NVIC_ Config()

**

**

**Function Description: interrupt vector configuration.

**

**Parameter: None

**

**Return value: None

**

***************************************************************************************************

*/

voidNVIC_ Config(void)

{

NVIC_ InitTypeDefNVIC_ InitStructure;

/*Configureonebitforpreemptionpriority——————————–*/

NVIC_ PriorityGroupConfig(NVIC_ PriorityGroup_ 0);

/*UART1——————————————————————–*/

NVIC_ InitStructure.NVIC_ IRQChannel=USART1_ IRQn;

NVIC_ InitStructure.NVIC_ IRQChannelPreemptionPriority=0;

NVIC_ InitStructure.NVIC_ IRQChannelSubPriority=1;

NVIC_ InitStructure.NVIC_ IRQChannelCmd=ENABLE;

NVIC_ Init(&NVIC_ InitStructure);

/*UART2——————————————————————–*/

NVIC_ InitStructure.NVIC_ IRQChannel=USART2_ IRQn;

NVIC_ InitStructure.NVIC_ IRQChannelPreemptionPriority=0;

NVIC_ InitStructure.NVIC_ IRQChannelSubPriority=0;

NVIC_ InitStructure.NVIC_ IRQChannelCmd=ENABLE;

NVIC_ Init(&NVIC_ InitStructure);

}

Analysis: This is an example of the reason why I write. Because two serial ports are not required to work at the same time, but they are not allowed to interfere with each other, (interrupt each other), so the interrupts of two serial ports are classified into the same group level, NVIC_ PriorityGroupConfig(NVIC_ PriorityGroup_ 0); Under 0 group level, there is only 1 preemption priority; Under this preemption priority, there are 16 sub priorities, so the sub priority of serial port 1 is 1, and the sub priority of serial port 2 is 0; Although the priority of serial port 2 is higher than that of serial port 1, because they belong to the same group, when one of them is communicating, the other can’t interrupt the communicating serial port;

Extension: when three serial ports choose not to work at the same time (or when multiple devices request not to work at the same time, but have priority response, they can be placed in 16 sub priorities under 0 group level, 0 preemption level)

Source; 21ic

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