Driven by the concepts of machine learning / deep learning, automation, better design capability, 5g and edge computing, various industries such as automobile, industry and medical treatment are undergoing unprecedented digital transformation, and promote the development of customized systems and SOC optimized for their specific application requirements. Anirudh devgan analyzes this sentence from the current situation. Intellectualization is unstoppable: “we have entered the era of intelligent system design.”

“Neurons are compared to nodes and synapses are compared to connecting lines to form an artificial neural network. Neurons communicate through synapses, and the weight of synapses determines whether they can communicate. In this way, any neuron is a pile of data, weighted, and then to the next level. This is a new way of calculation”, which describes today’s neural network, It also expresses the change about the amount of data behind it: “the amount of data required to process the artificial neural network is amazing, and the vgg19 model has reached 19.6 billion floating-point operations per second (as shown in the right histogram in the figure below).”

In the information age, algorithms, computing power and data have increased millions of times in the past 30 years. However, in the intelligent era, in the past five years, the algorithm has been improved by one million times, the computing power has been improved by one hundred thousand times, and the data has been improved by ten thousand times. The dividing point here is the moment when alpha dog came out. Now the machine has improved its algorithm a million times. At the same time, this is also an era of iterative evolution of algorithms. The algorithm changes every 6 or 3 months. An algorithm corresponds to an application. There is no general algorithm, which is disastrous for our hardware (chip).

To cope with this “disaster”, we obviously need the scenario conceived at the beginning of this paper – “let the chip automatically evolve the algorithm and software through the learning process”.

How difficult is it to make FPGA chips intelligent

“The amount of computation is large enough and the energy efficiency is high enough, which is difficult to balance. From the current amount of computation in T, it is almost necessary to realize supercomputing on a single chip. Originally, we imagined that there was a demand at 5nm / 10nm, and the artificial neural network has made the chip reach the supercomputing capacity long ago.” Wei Shaojun said, The smart chip in his eyes needs to have at least the following 8 characteristics.

1. Programmability, adapting to the changing algorithm; 2. Change the architecture to adapt to the algorithm and obtain the best computing efficiency; 3. Very good architecture transformation ability; 4. Very high computational efficiency. It is definitely not possible to use instructions; 5. High energy efficiency; 6. Low cost; 7. Small volume; 8. Simple, development and application should be simple. As long as the software engineer can program.

So far, Wei Shaojun believes that “software defined chip” is the best practice. Its concept is to continuously send the block software / program to the data channel, so that the chip can change the function in real time according to the needs of software or products, so as to realize more flexible chip design. Last year, the electronic industry revitalization program (ERI) promoted by the advanced program Agency (DARPA) of the U.S. Department of defense, one of which is the concept of software defining hardware.

Of course, the current software defined chip architecture does not escape the von Neumann architecture. It can be seen that the architecture has a theoretical basis in terms of computational completeness. The 1.0 era includes TPU, which pursues performance and low power consumption. The 1.5 era includes DPU thinker, which should not only be reconfigurable, but also pursue energy efficiency and flexibility. The 2.0 era includes all the previous points. Wei Shaojun believes that AI chip 2.0 is the real wisdom, but it has not yet appeared.

2019 is a special year for the company, officially stepping into the field of system design and system analysis, aiming to help users realize more intelligence in daily development. The intelligent system design strategy here is what anirudh devgan said: “take technical (Computing) software as the core capability, including quoting AI and algorithm optimization design tools, expanding to new system fields, and executing core EDA and IP.”

In addition, in order to optimize the design scheme, cadence put forward the concept of mutual integration of machine learning and EDA, and brought new ideas in China’s IC design market, as follows: (1) ml inside: through the latest machine learning engine, improve digital design tools and bring better PPA. Accelerate the future intelligent layout design through the analysis and decision-making of past big data. (2) Ml outside: automatic design process to improve the production efficiency of the whole design. (3) Ml enablement: the collaborative design of software and hardware, and cadence’s unique Tensilica processor IP, apply machine learning to improve system level optimization.

If you can guess the important scenarios and the important algorithms correctly, you can deal with the uncertainty of the architecture itself. Then there is much to be done. ” According to the idea of the picture, we focus on the video visual processing to realize the full analysis of “supporting 10000 cameras with one cabinet, so as to greatly reduce and compress the energy consumption, cost and space. In this way, the author feels that the chip industry is too difficult, and the Utopian” smart chip “in front of us In addition to the perfect application scenario, the design tool itself must have both intelligent systems. In addition, talents, capital and policy assistance are the complete way to upgrade the chip.

Leave a Reply

Your email address will not be published. Required fields are marked *