“For edge technology, the key is how to optimize the required performance while minimizing power consumption.”

Given that industry events have generally shifted to virtual events during the pandemic, I have attended 6 virtual semiconductor conferences so far this year. One of the hot topics of discussion was artificial intelligence (AI) and deep learning (DL) chips, a growing field that spans a wide range of technologies and device types. A common theme is a focus on memory optimization and addressing power/memory bottlenecks.

Artificial intelligence is a hot market. According to estimates by ABI Research, the entire artificial intelligence chip market will reach $21 billion in 2024. Surprisingly, ASIC-based AI accelerators make up a large portion of the market and are expected to triple in value to reach a total available market (TAM) of $9 billion by 2024, at a compound annual growth rate (CAGR) ) is 30%.

Companies are looking for ways to develop low-power training and inference processing solutions. While machine learning only accounts for a portion of the total power consumption in a data center, this portion of power consumption is rapidly expanding. In 2017, data centers consumed about 3 percent of the total U.S. electricity, a figure that doubled to 6 percent in 2020. The adoption of smart edge devices is also accelerating. According to market research firm IDC, nearly 60 zettabytes of data will be created, captured, replicated and consumed annually by 125 billion “things” connected to the Internet over the next decade.

It is clear that our industry faces a major challenge: how to deploy multiple smart devices at the edge, infer all data at the edge with extremely low power consumption, and manage, process and train exponentially growing data in the cloud, while integrating Power consumption remains within control levels.

AI Reference Package Development

“There is a power bottleneck in both inference and training,” said Hiren Majmudar, vice president of the computing business unit at GLOBALFOUNDRIES®, and GLOBALFOUNDRIES products address this well, whether it’s FinFET-based 12LP (12nm) FinFET) platform and 12LP+ solution, and a planar 22FDXTM (22nm FD-SOI) platform based on fully depleted SOI.

AI processors based on FinFET technology, whether used in the cloud or at the edge, offer power and cost advantages. The 12LP+ solution is capable of running AI cores at speeds above 1 Ghz, and features a new low-voltage SRAM and standard cell library that supports operation at 0.55V. GF’s advanced FinFET solution, the 12LP+, which went into production this year, provides up to 20% higher logic performance for dual work function FETs compared to the 12LP base platform, which translates to up to 40% lower power consumption.

“Our customers use unique architectures that often rely on a limited set of standard cells,” he said. “We have been working on Design Technology Co-Optimization (DTCO) and have developed an AI reference package that can be fully leveraged with a set of prepackaged components. Unlock potential. With the collaborative DTCO model, our customers can quickly bring SoC targets to market. DTCO work includes design analysis services based on the customer’s own architecture to optimize for performance, power and area (PPA).”

Majmudar says the best PPA varies by application.

He said: “All segments are very cost-conscious. For cloud computing, the metric is TOPS per watt, getting the best performance with the lowest power consumption. For edge technology, the key is how to optimize the required performance, while minimizing power consumption.”

For customers developing “instant-on or always-on” AI applications, 22FDX’s eMRAM offering has strong advantages, Majmudar said. He added: “eMRAM has many applications to help customers achieve high density and non-volatility. Another capability is to simulate in-memory computing.”

AI workloads are broad and include speech, vision, and imaging in addition to training and inference. He said: “We are a specialty fab that is constantly introducing innovative IP products. We continue to invest in IP, wafer-to-wafer interconnect, memory and interface IP. We have a clear roadmap and are constantly taking input from our customers. Improve.”

innovative start-up

In a future blog, I plan to detail how GF is partnering with startups in this space, but this article will introduce one of those companies to give you a glimpse into the richness of GF’s customer innovations in AI chips.

The fully depleted silicon-on-insulator platform is designed to support dynamic voltage, frequency scaling and automatic clock gating. This enables ultra-low-power signal processing and neural network algorithms that can be used in battery-powered IoT devices.

Perceive, a majority-owned subsidiary of Xperi Corp., aims to provide artificial intelligence inference on sensor data in ultra-low-power consumer devices. Perceive’s “Ergo” edge inference processors are capable of processing large neural networks on-device at 20 to 100 times the efficiency of processors currently supporting inference.

The company focuses on enabling security cameras, smart appliances and mobile devices by integrating neural network processing technology without sending data to the cloud for inference processing.
Editor in charge AJX

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