In this paper, a hardware design scheme of digital nuclear pulse analyzer based on FPGA is proposed, which uses field programmable logic unit (FPGA) to complete the hardware design of digital multi-channel pulse amplitude analyzer. The amplitude of digital nuclear pulse is extracted and energy spectrum is generated by Quartus Ⅱ software on FPGA platform. On this basis, a digital energy spectrum measurement experimental device is established by circuit design. The measured spectrum of 137Cs is in good agreement with the measured spectrum of analog energy spectrometer under the same conditions. It is proved that the hardware design of digital multi-channel pulse amplitude analyzer based on FPGA is correct, feasible and practical.

Multi channel pulse amplitude analyzer and X-ray spectrometer are commonly used in nuclear monitoring and technology application. In the 1990s, a new multi-channel energy spectrometer based on high-speed nuclear pulse waveform sampling and digital filter shaping technology has been developed abroad, which makes digitization an important direction of the development of pulse energy spectrometer. The domestic spectrometer technology has remained at the level of analog technology for many years, and the digital energy spectrum measurement technology is still in the stage of method research. In order to meet the increasing demand of high-performance energy spectrometer, it is urgent to develop a digital gamma spectrometer. The nuclear spectrum displayed on the display by nuclear pulse analyzer can help people understand the radioactivity of nuclear materials.

Hardware circuit of FPGA digital nuclear pulse analyzer

Figure 1 is the overall design block diagram. After simple conditioning by the front-end circuit, the nuclear pulse signal output by the detector is converted to differential by a single end. The high-speed ADC with sampling rate of 65 MHz performs analog-to-digital conversion under the control of FPGA to complete the digitization of nuclear pulse. The nuclear spectrum is formed in FPGA through digital nuclear pulse processing algorithm. The nuclear spectrum data can be transmitted through 16 channels It can be transmitted to other spectrum data processing terminals through bit parallel interface, and can also be remotely transmitted through LVDS / RS 485 interface. In particular, due to the high-speed AD front-end, the conditioning circuit should meet the needs of broadband and high-speed, and the circuit parameters can be dynamically adjusted to adapt to the output signals of different types of detectors, so as to better play the advantages of digital technology.

  Front end circuit

The front-end circuit consists of a single terminal to differential and a high-speed ADC circuit. Differential circuit is widely used because of its good anti common mode interference ability. Because the pulse signal output by the conditioning circuit is unipolar, if it is directly sent to the ADC, half of the dynamic range will be lost. In the design, an appropriate bias voltage is added to the op amp to convert the unipolar signal into the bipolar signal and then send it to the ADC to ensure the dynamic range. At the same time, the anti aliasing filter is used to adjust the bandwidth.

Hardware circuit of FPGA digital nuclear pulse analyzer

This design uses ad9649-65 high-speed ADC to realize a / D conversion of nuclear pulse. Ad9649 is a 14 bit parallel output high-speed A / D converter, which has the advantages of low power consumption, small size and good dynamic characteristics. When the signal from the detector through the conditioning circuit, through the differential to single ended circuit, it enters the ADC in the form of differential signal. Under the control of the differential clock, it is converted into 14 bit data and enters the FPGA. The high-speed A / D samples the signal under the control of the external FPGA. Then the sampled digital signal is sent to FPGA to realize the amplitude extraction of digital core pulse. Figure 2 is the schematic diagram of a / D conversion, ad9649 completes a / D conversion under the synchronization of differential clock, and d0 ~ D13 are 14 effective output data bits.


At present, there are mainly two schemes for digital realization of multi-channel pulse amplitude analysis at home and abroad: pure DSP scheme and DSP + programmable device scheme. This paper will give full play to the parallel processing advantages of FPGA, and realize the nuclear pulse acquisition and digital nuclear pulse processing algorithm on a single FPGA chip. Through the simulation and synthesis of quatus – Ⅱ software, this paper selects ep3c40 FPGA chip to realize the digital function of multi-channel analyzer.

Hardware circuit of FPGA digital nuclear pulse analyzer

LVDS and RS485 long-distance data transmission interfaces are used in the design of interface circuit to realize the remote transmission of nuclear spectrum data. LVDS is a low-voltage differential signal, which can realize point-to-point or point to multipoint connection. It has the characteristics of low power consumption, low bit error rate, low crosstalk, low noise and low radiation. LVDS has been widely used in systems with high requirements for signal integrity, ground jitter and common mode characteristics. Figure 3 shows the LVDS interface circuit with low voltage and maximum data transmission rate of 655 MB / s.

Hardware design of digital nuclear pulse analyzer based on FPGA. The scheme realizes the digital analysis function of multi-channel pulse amplitude in a single-chip FPGA. The feasibility of hardware design of digital multi-channel pulse amplitude analyzer is illustrated by software function simulation and actual operation. The application of FPGA to digital spectrum measurement system can give full play to its parallel processing advantages and effectively reduce the complexity of hardware circuit design.

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