Although printed circuit board (PCB) wiring plays a key role in high-speed circuits, it is often one of the last steps in the circuit design process. There are many problems in high-speed PCB wiring. A lot of literature has been written on this topic. This paper mainly discusses the wiring of high-speed circuits from the perspective of practice. The main purpose is to help new users pay attention to a variety of different problems that need to be considered when designing PCB wiring of high-speed circuits. Another purpose is to provide a review material for customers who have not touched PCB wiring for some time. Due to the limited layout, this paper can not discuss all the problems in detail, but we will discuss the key parts that have the greatest effect on improving circuit performance, shortening design time and saving modification time.
Although this is mainly for the circuits related to high-speed operational amplifiers, the problems and methods discussed here are generally applicable to the wiring of most other high-speed analog circuits. When the operational amplifier works in a high radio frequency (RF) band, the performance of the circuit largely depends on PCB wiring. If the high-performance circuit design that looks good on the “drawing” is affected due to careless wiring, only ordinary performance can be obtained in the end. Considering and paying attention to important details throughout the wiring process will help to ensure the expected circuit performance.
Although good schematics cannot guarantee good wiring, good wiring begins with good schematics. When drawing the schematic diagram, it should be considered carefully, and the signal flow direction of the whole circuit must be considered. If there is a normal and stable signal flow from left to right in the schematic diagram, there should be the same good signal flow on the PCB. Give as much useful information as possible on the schematic diagram. Because sometimes when the circuit design engineer is away, the customer will ask us to help solve the circuit problems. The designers, technicians and engineers engaged in this work will be very grateful, including us.
In addition to the common reference identifier, power consumption and error tolerance, what information should be given in the schematic diagram? Here are some suggestions to turn an ordinary schematic into a first-class schematic. Add waveform, mechanical information about the shell, printed line length and blank area; Indicate which components need to be placed on the PCB; Give adjustment information, component value range, heat dissipation information, control impedance printed line, notes, brief circuit action description and others.
Don’t believe anyone
If you don’t design the wiring yourself, be sure to allow plenty of time to carefully check the wiring person’s design. At this point, a small prevention is worth a hundred times the remedy. Don’t expect wiring people to understand your ideas. At the beginning of the wiring design process, your advice and guidance are the most important. The more information you can provide, and the more you intervene in the whole wiring process, the better the PCB will be. Set a tentative completion point for the wiring design engineer – check quickly according to the wiring progress report you want. This “closed loop” approach prevents wiring from going astray, minimizing the possibility of rework.
The instructions to be given to the wiring engineer include: brief description of circuit functions, PCB sketch indicating input and output positions, PCB stacking information (for example, how thick the board is, how many layers are there, and detailed information of each signal layer and grounding plane – power consumption, ground wire, analog signal, digital signal and RF signal); What signals are required for each layer; Position of important components required; Exact location of bypass elements; Which printed lines are important; Which lines need to control impedance printed lines; Which lines need matching length; Dimensions of components; Which printed lines need to be away from (or close to) each other; Which lines need to be away from (or close to) each other; Which components need to be away from (or close to) each other; Which components should be placed above the PCB and which should be placed below. Never complain that you need to give others too much information – too little? Yes; Too much? no
A learning experience: about 10 years ago, I designed a multilayer surface mount circuit board with components on both sides. The plate is fixed in a gold-plated aluminum shell with many screws (because of the strict shockproof index). The pins that provide bias feedthrough pass through the board. The pin is connected to the PCB through a welding wire. This is a very complicated device. Some components on the board are used for test setup (SAT). But I have clearly defined the location of these elements. Can you guess where these components are installed? By the way, it’s under the board. When product engineers and technicians had to disassemble the whole device and reassemble them after setting, they looked very unhappy. I haven’t made such a mistake since then.
Just like in PCB, position determines everything. Where to place a circuit on the PCB, where to install its specific circuit components, and what other adjacent circuits are, all these are very important.
Usually, the positions of input, output and power supply are predetermined, but the circuits between them need to “give full play to their creativity”. This is why paying attention to wiring details will yield huge returns. Starting from the position of key components, it is considered according to the specific circuit and the whole PCB. Specifying the location of key components and the path of signals from the beginning helps to ensure that the design achieves the expected working objectives. Getting the right design at once can reduce cost and pressure – and shorten the development cycle.
Bypassing the power supply at the power end of the amplifier to reduce noise is a very important aspect in the PCB design process, including high-speed operational amplifier or other high-speed circuits. There are two common configuration methods for bypass high-speed operational amplifiers.
Power terminal grounding: this method is the most effective in most cases. Multiple parallel capacitors are used to directly ground the power pin of the operational amplifier. Generally speaking, two shunt capacitors are enough – but adding shunt capacitors may benefit some circuits.
Paralleling capacitors with different capacitance values helps to ensure that the power supply pin can only see very low AC impedance over a wide frequency band. This is particularly important at the attenuation frequency of the operational amplifier power rejection ratio (PSR). The capacitor helps to compensate for the reduced PSR of the amplifier. Maintaining a low impedance ground path in many ten octave frequency ranges will help to ensure that harmful noise cannot enter the operational amplifier. Fig. 1 shows the advantages of using multiple shunt capacitors. At low frequencies, large capacitors provide a low impedance ground path. However, once the frequency reaches their own resonant frequency, the capacitance of capacitors will weaken and gradually show inductance. This is why it is important to use multiple capacitors: when the frequency response of one capacitor begins to decline, the frequency response of the other capacitor begins to work, so it can maintain a very low AC impedance in many ten octave frequency ranges.
Start directly from the power pin of the operational amplifier; Capacitors with minimum capacitance and minimum physical size should be placed on the same side of the PCB as the operational amplifier – and as close to the amplifier as possible. The grounding terminal of the capacitor shall be directly connected to the grounding plane with the shortest pin or printed wire. The above grounding connection should be as close to the load end of the amplifier as possible to reduce the interference between the power end and the grounding end. Fig. 2 shows this connection method.
This process should be repeated for capacitors with sub large capacitance. It is best to start with a minimum capacitance of 0.01mf and place a 2.2mf (or larger) electrolytic capacitor with low equivalent series resistance (ESR) close to it. The 0.01mf capacitor with 0508 shell size has very low series inductance and excellent high frequency performance.
Power end to power end: another configuration method uses one or more bypass capacitors to bridge between the positive power end and the negative power end of the operational amplifier. This method is usually used when it is difficult to configure four capacitors in the circuit. Its disadvantage is that the shell size of the capacitor may increase, because the voltage at both ends of the capacitor is twice the voltage value in the single power supply bypass method. Increasing the voltage requires increasing the rated breakdown voltage of the device, that is, increasing the shell size. However, this method can improve PSR and distortion performance.
Because each circuit and wiring are different, the configuration, quantity and capacitance value of capacitors should be determined according to the requirements of the actual circuit.
The so-called parasitic effects are those small faults that slip into your PCB and cause great damage, headache and unknown cause in the circuit. They are the parasitic capacitances and inductors hidden in high-speed circuits. Including parasitic inductance formed by too long package pins and printed lines; Parasitic capacitance formed between pad to ground, pad to power plane and pad to printed wire; The interaction between vias and many other possible parasitic effects. Fig. 3 (a) shows a schematic diagram of a typical in-phase operational amplifier. However, if the parasitic effect is considered, the same circuit may become as shown in Fig. 3 (b).
In high-speed circuits, a small value will affect the performance of the circuit. Sometimes dozens of PI fa (PF) capacitors are enough. Related example: if there is only 1pf additional parasitic capacitance at the inverting input, it can cause almost 2dB sharp pulse in the frequency domain (see Fig. 4). If the parasitic capacitance is large enough, it will cause circuit instability and oscillation.
When looking for the parasitic source in question, several basic formulas for calculating the parasitic capacitance sizes mentioned above may be used. Formula (1) is the formula for calculating the parallel plate capacitor (see Figure 5).
C represents the capacitance value, a represents the plate area in cm2, K represents the relative dielectric constant of PCB material, and D represents the distance between plates in cm.
Banded inductance is another parasitic effect that needs to be considered. It is caused by too long printed wire or lack of grounding plane.
Equation (2) shows the formula for calculating the inductance of printed line. See Figure 6.
W represents the width of the printed line, l represents the length of the printed line, and H represents the thickness of the printed line. All dimensions are in mm.
The oscillation in Fig. 7 shows the effect of a printed line with a length of 2.54 cm at the in-phase input of a high-speed operational amplifier. The equivalent parasitic inductance is 29 NH (10-9h), which is sufficient to cause continuous low-voltage oscillation and will last until the whole transient response cycle. Fig. 7 also shows how to use the ground plane to reduce the influence of parasitic inductance.
Vias are another parasitic source; They can cause parasitic inductance and parasitic capacitance. Formula (3) is the formula for calculating parasitic inductance (see Fig. 8).
T represents the thickness of PCB and D represents the through hole diameter in cm.
Equation (4) shows how to calculate the parasitic capacitance caused by the through hole (see Fig. 8).
Er represents the relative permeability of PCB material. T indicates the thickness of PCB. D1 represents the pad diameter around the through hole. D2 represents the diameter of the isolation hole in the ground plane. All dimensions are in cm. On a 0.157 cm thick PCB, a through hole can increase 1.2 NH parasitic inductance and 0.5 pf parasitic capacitance; This is why we must always be on guard when wiring PCB to minimize the impact of parasitic effects.
In fact, there is much more to be discussed than mentioned in this article, but we will highlight some key features and encourage readers to explore this issue further.
The ground plane acts as a common reference voltage, provides shielding, can dissipate heat and reduce parasitic inductance (but it will also increase parasitic capacitance). Although the use of a ground plane has many advantages, it must be implemented with care because it has some limitations on what can and cannot be done.
Ideally, a PCB has a layer that should be used exclusively as a ground plane. This will produce the best results when the whole plane is not damaged. Never use the area of the grounding plane in this special layer for connecting other signals. Since the grounding plane can eliminate the magnetic field between the conductor and the grounding plane, the inductance of the printed line can be reduced. If an area of the ground plane is damaged, unexpected parasitic inductance will be introduced to the printed wire above or below the ground plane.
Because the ground plane usually has a large surface area and cross-sectional area, the resistance of the ground plane is kept to a minimum. In the low frequency band, the current will choose the path with the lowest resistance, but in the high frequency band, the current will choose the path with the lowest impedance.
However, there are exceptions. Sometimes a small ground plane is better. If the ground plane is removed from under the input or output pad, the high-speed operational amplifier will work better. Because the parasitic capacitance introduced in the ground plane of the input end increases the input capacitance of the operational amplifier and reduces the phase margin, resulting in instability. As can be seen in the discussion in the parasitic effects section, the capacitance of 1 pf at the input of the operational amplifier can cause obvious sharp pulses. Capacitive loads at the output – including parasitic capacitive loads – cause poles in the feedback loop. This reduces the phase margin and causes the circuit to become unstable.
If possible, analog and digital circuits – including their respective ground and ground planes – should be separated. The fast rising edge will cause current burrs to flow into the ground plane. The noise caused by these fast current burrs will destroy the simulation performance. Analog ground and digital ground (and power supply) shall be connected to a common ground point to reduce circulating digital and analog ground current and noise.
In the high frequency band, a phenomenon called “skin effect” must be considered. The skin effect causes current to flow to the outer surface of the conductor – the result is a narrower cross-section of the conductor, thereby increasing the direct current (DC) resistance. Although the skin effect is beyond the scope of this paper, a good approximate formula of skin depth in copper wire (in cm) is given here:
Electroplating metal with low sensitivity helps to reduce the skin effect.
Operational amplifiers are usually packaged in different forms. The selected package will affect the high frequency performance of the amplifier. The main effects include parasitic effects (mentioned earlier) and signal paths. Here we focus on the path input, output and power supply of the amplifier.
Fig. 9 shows the wiring difference between operational amplifiers using SOIC package (a) and SOT-23 package (b). Each package has its own problems. Focus on (a). If you carefully observe the feedback path, you will find that there are many ways to connect feedback. The most important thing is to ensure the shortest length of printed wire. Parasitic inductance in the feedback path can cause ringing and overshoot. In FIGS. 9 (a) and 9 (b), a feedback path is connected around the amplifier. Fig. 9 (c) shows another method – connecting the feedback path under the SOIC package – which reduces the length of the feedback path. Each method has subtle differences. The first method will cause the printed line to be too long, which will increase the series inductance. The second method uses a through hole, which will cause parasitic capacitance and parasitic inductance. The influence of these parasitic effects and their hidden problems must be considered when wiring PCB. SOT-23 wiring difference is almost ideal: the length of feedback printed line is the shortest, and through holes are rarely used; The load and bypass capacitance return from a short path to the same ground connection; The capacitance of the positive power supply terminal (not shown in Fig. 9 (b)) is placed directly under the negative power supply capacitance on the back of the PCB.
Pin arrangement of low distortion amplifier: some operational amplifiers (such as ad80451) provided by Adi company adopt a new low distortion pin arrangement, which helps to eliminate the two problems mentioned above; And it also improves the performance of two other important aspects. The low distortion pin arrangement of lfcsp, as shown in Figure 10, moves the pin arrangement of the traditional operational amplifier by one pin in a counterclockwise direction, and adds an output pin as a special feedback pin.
The low distortion pin arrangement allows a close connection between the output pin (dedicated feedback pin) and the inverting input pin, as shown in Figure 11. This greatly simplifies and improves wiring.
Another advantage of this pin arrangement is to reduce the second harmonic distortion. One of the causes of second harmonic distortion in the pin configuration of traditional operational amplifier is the coupling between in-phase input and negative power supply pin. The low distortion pin arrangement of lfcsp package eliminates this coupling, so the second harmonic distortion is greatly reduced; In some cases, it can be reduced by up to 14 dB. Fig. 12 shows the difference of distortion performance between SOIC package and lfcsp package for ad80992.
This package also has the advantage of low power consumption. The lfcsp package has a bare pad, which reduces the thermal resistance of the package and improves the θ JA value is about 40%. Because the thermal resistance is reduced, the working temperature of the device is reduced, which is equivalent to improving the reliability.
At present, ADI company provides three kinds of high-speed operational amplifiers with new low distortion pin arrangement: ad8045, ad8099 and ad80003.
Wiring and shielding
There are a variety of analog and digital signals on PCB, including high to low voltage or current, DC to GHz frequency range. It is very difficult to ensure that these signals do not interfere with each other.
Reviewing the suggestions in the previous “don’t believe anyone”, the key is to think in advance and make a plan for how to deal with the signals on the PCB. It is important to note which signals are sensitive and determine what measures must be taken to ensure the integrity of the signal. The ground plane provides a common reference point for electrical signals and can also be used for shielding. If signal isolation is required, first leave a physical distance between the signal printed lines. Here are some practical experiences worth learning from:
*Inductive coupling can be reduced by reducing the length of long parallel lines in the same PCB and the proximity between signal printed lines.
*Reducing the length of the long printing line of adjacent layers can prevent capacitive coupling.
*Signal printed lines requiring high isolation should go through different layers, and – if they cannot be completely isolated – should go through orthogonal printed lines, and the grounding plane should be placed between them. Orthogonal wiring minimizes capacitive coupling, and the ground wire forms an electrical shield. This method can be used when forming a control impedance printed line.
High frequency (RF) signals usually flow on control impedance printed lines. That is, the printed line maintains a characteristic impedance, such as 50 Ω (typical value in RF Applications). The two most common control impedance printed lines, microstrip line 4 and stripline 5, can achieve similar results, but the implementation methods are different.
The microstrip control impedance printed line, as shown in FIG. 13, can be used on any side of the PCB; It directly adopts the grounding plane below it as its reference plane.
Equation (6) can be used to calculate the characteristic impedance of a FR4 plate.
H represents the distance from the grounding plane to the signal printed line, w represents the width of the printed line, and T represents the thickness of the printed line; All dimensions are in mils (10-3 inches). Er represents the dielectric constant of PCB material.
The strip control impedance printed wire (see Figure 14) adopts two layers of grounding plane, in which the signal printed wire is clamped. This method uses more printed lines, requires more PCB layers, is sensitive to dielectric thickness changes, and costs more – so it is usually only used in demanding applications.
The characteristic impedance calculation formula for stripline is shown in formula (7).
Protection ring, or “isolation ring”, is another shielding method commonly used in operational amplifiers. It is used to prevent parasitic current from entering sensitive nodes. The basic principle is very simple – the sensitive node is completely surrounded by a protective wire, and the wire maintains or forces it to maintain (low impedance) the same potential as the sensitive node, so the absorbed parasitic current is far away from the sensitive node. FIG. 15 (a) shows a schematic diagram of a guard ring used in an inverting configuration and an in-phase configuration of an operational amplifier. FIG. 15 (b) shows a typical wiring method for two protection rings in sot-23-5 package.
High level PCB wiring is very important for successful operational amplifier circuit design, especially for high-speed circuits. A good schematic diagram is the basis of good wiring; Close cooperation between circuit design engineers and wiring design engineers is fundamental, especially with regard to the location of devices and wiring. The problems to be considered include bypass power supply, reducing parasitic effects, the use of grounding plane, the impact of operational amplifier packaging, and the methods of wiring and shielding.