Myth 1: the PCB design requirements of this board are not high, so use a thinner line to automatically cloth it.

Comments: automatic wiring must occupy a larger PCB area and produce many times more vias than manual wiring. In large quantities of products, in addition to commercial factors, the factors considered by PCB manufacturers for price reduction are line width and vias quantity, which affect the finished product rate of PCB and the consumption of drill bit respectively, saving the cost of suppliers, It also found a reason to reduce the price.

Eight misunderstandings and solutions of PCB design

Myth 2: these bus signals are pulled with resistors. I feel relieved.

Comments: there are many reasons why signals need to be pulled up and down, but not all of them. When the pull-up and pull-down resistors pull a simple input signal, the current will be less than tens of microamps, but when they pull a driven signal, the current will reach the milliampere level. The current system often has 32 bits of address data, and there may be 244 / 245 isolated bus and other signals. If they are pulled up, a few watts of power consumption will be consumed on these resistors.

Myth 3: how to deal with these unused I / O ports of CPU and FPGA? Let it be empty first and then.

Comments: if the unused I / O port is suspended, it may become an input signal with repeated oscillation due to a little interference from the outside world, and the power consumption of MOS devices basically depends on the flip times of the gate circuit. If you pull it up, each pin will also have microampere current, so the best way is to set it as output (of course, other driving signals cannot be connected outside)

Myth 4: there are so many gates left in this FPGA, you can play it to your heart’s content

Comments: the power consumption of FGPA is directly proportional to the number of triggers used and their turnover times, so the power consumption of the same type of FPGA at different times of different circuits may vary by 100 times. Minimizing the number of flip flops at high speed is the fundamental method to reduce FPGA power consumption.

Myth 5: the power consumption of these small chips is very low, don’t consider it

Comments: it is difficult to determine the internal power consumption of less complex chips. It is mainly determined by the current on the pins. An abt16244 consumes less than 1 Ma without a load, but its index is that each pin can drive a 60 Ma load (such as matching a resistance of tens of ohms), that is, the maximum power consumption at full load can reach 60 * 16 = 960ma, of course, it is only such a large power supply current, The heat fell on the load.

Myth 6: there are so many control signals in the memory. My board only needs to use OE and we signals. The chip selection is grounded. In this way, the data comes out much faster during reading operation.

Comments: the power consumption of most memories will be more than 100 times greater when the chip selection is valid (regardless of OE and we) than when the chip selection is invalid. Therefore, CS should be used to control the chip as much as possible, and the width of the chip selection pulse should be reduced as much as possible when other requirements are met.

Myth 7: Why are these signals overshoot? As long as the match is good, it can be eliminated

Comments: except for a few specific signals (such as 100Base-T and CML), they all have overshoot. As long as they are not very large, they do not necessarily need to be matched. Even if they are matched, they do not need to be matched best. For example, the output impedance of TTL is less than 50 ohms, and some even 20 ohms. If such a large matching resistance is used, the current will be very large, and the power consumption is unacceptable. In addition, the signal amplitude will be too small to be used. In addition, the output impedance of general signals at high output level and low output level is not the same, and there is no way to achieve complete matching. Therefore, for the matching of TTL, LVDS, 422 and other signals, as long as the overshoot is acceptable.

Myth 8: reducing power consumption is the business of hardware personnel, which has nothing to do with software.

Comments: the hardware is just a stage, but the software is playing. The access of almost every chip on the bus and the reversal of every signal are almost controlled by the software. If the software can reduce the access times of external memory (use more register variables, use more internal cache, etc.) and respond to interrupts in time (interrupts are often effective at low level and with pull-up resistance) And other specific measures for specific boards will make a great contribution to reducing power consumption.

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