Due to the economic downturn and the reduction of development budget, embedded system designers are turning to FPGA (field programmable gate array) technology to reduce the development cycle, combat equipment aging and simplify product upgrading. By using a large and increasing number of FPGA development tools, reusable logic units and commercial modules, designers can conceive high-performance embedded systems and reconfigure them according to demand changes, so as to minimize the impact on engineering and manufacturing. In the past, circuit board designers used these devices to interconnect system components, but the latest high-density products can also replace the processor, memory, custom logic and many peripherals embedded in a typical project. Although it has the ability to change the embedded architecture, designers should still analyze the performance, power and cost limitations to determine where FPGA technology is most suitable.

Since the 1970s, FPGA technology has become a booming logic array market. Although the precise structure of each supplier’s FPGA is different, the basic FPGA architecture includes a logic block array with electrically programmable interconnection, which can be configured by users or designers after manufacturing. Early devices had thousands of equivalent gates, but today the number has grown to millions. This interconnection flexibility enables designers to build hardware functions that accurately match the requirements of specific embedded applications. In addition to logic blocks, the latest devices also embed special processors in silicon chips, enabling designers to make software and hardware tradeoffs to meet performance requirements.

In compatible embedded applications, FPGA technology provides developers with a variety of advantages for discrete implementation or custom logic implementation. When talking about the main reasons for adopting FPGA, many experienced designers will mention the shorter development schedule, lower non repetitive cost and the ability to merge changes after mass production. In high-performance applications, designers can establish multiple parallel computing structures, and their performance exceeds that of special processors. FPGA has a frequently mentioned disadvantage, that is, it needs more power consumption than general-purpose processor or custom ASIC. Similarly, due to the existence of multiple on transistors and the resistance of the connection path, the products using FPGA are also slower than the ordinary design. Although the development time of other schemes is not considered, the repetition cost of FPGA technology is higher than that of ordinary circuits or custom circuits.

FPGA uses a variety of technologies for interconnection and logic block programming. For example, an anti fuse silicon structure will establish a low resistance link when a high voltage is applied at both ends. Its advantages include low series resistance and low parasitic capacitance, but the main disadvantage is that the FPGA with anti fuse is a write once device, so it cannot be reconfigured. The most common programming technology is the static RAM unit, which programs the FPGA structure by enabling and disabling the transistor. Although it takes multiple transistors to realize a memory cell, SRAM has fast reprogrammability and can be realized by conventional silicon CMOS technology. The FPGA based on SRAM also needs an external boot device to set the memory when powered on. In addition, EPROM, EEPROM and flash memory technology can also be used for FPGA programming, which has the advantage of repeatable programming ability without external boot devices.

Manufacturers have also created a variety of methods to describe and program FPGA circuits. The most common method is to use an HDL (hardware description language), such as Verilog or VHDL (ultra high speed integrated circuit HDL), to describe the function and structure of a design. Once the architecture is defined, it can be implemented on a specified FPGA with another tool. This process includes power and structure optimization, followed by hardware zoning, layout and interconnection cabling. The last stage is to load the design into the target FPGA and test it in the real hardware environment.

Figure 1 the embedded software evaluation tool suite of national instruments enables users to create, compile and run FPGA applications from a graphical block diagram

As FPGA functionality grows with complexity and density, designers have invented various ways to exchange modular blocks of HDL code so that others can integrate into their products. These function blocks are generally called IP (intellectual property) core, which enables manufacturers to reuse circuit components in previous designs, or simply purchase functions from outside. Examples of UART core, Ethernet codec, etc. Manufacturers directly implement the hard IP core on one FPGA silicon chip, and provide the soft core in the form of HDL code, which can be transplanted across a variety of devices. The IP core can be obtained directly from FPGA suppliers and third-party suppliers, or from free open source HDL code from open cores and other sources. Commercial IP is usually paid and includes documentation, verification tools and support.

For some FPGA developers, design security and IP loss may be a major consideration. In some cases, especially those SRAM designs that store configuration data externally and transmit it to FPGA when powered on, the IP information is relatively fragile. In order to prevent IP loss, FPGA suppliers use nonvolatile programming technology and embedded serial number to track forged products.

All FPGA suppliers provide a tool set, including programming tools and IP supporting devices. For example, Xilinx’s Virtex-5 fx70t version EDK (embedded development kit) provides an ml507 development board, platform studio embedded tool components and ISE (integrated software environment), supporting PowerPC 440 hard processor and MicroBlaze soft processor (Figure 1). The suite has an integrated development environment, a variety of software tools, configuration wizards, and embedded design of IP targets. Users can input a circuit in the logic diagram editor, simulate the timing performance of the circuit, compile the Virtex-5 FPGA, and then test the design on the ml507 prototype board. Virtex-5 fx70t EDK can be purchased online for $2595.

graphic design

In order to support single board Rio, Na t i o n a l instruments also launched an embedded software evaluation tool suite to evaluate the programming experience of LabVIEW real time and LabVIEW FPGA for embedded applications. The suite includes extended evaluation software, a Ni board Rio evaluation device, a daughter board for I / O interface, a power supply, cable, a step-by-step tutorial, and several common embedded task instances that can be run immediately in LabVIEW (Figure 2). The suite includes several exercises to learn how to create, compile and run FPGA applications by building and fine tuning graphical block diagrams in LabVIEW. The 90 day version of the LabVIEW embedded platform evaluation suite costs $999.

More and more commercial circuit board manufacturing companies are using FPGA technology to meet complex design requirements and allow future modifications.

For example, quantum 3D promises to provide timeless hardware in safety and security critical applications, such as major flight instruments and MLS (multi-layer security) systems, using the new sentiris AV1 PCI XMC (express mezzanine card) (Figure 3). The supplier adopts a combination of video and image processing core based on FPGA instead of the traditional dedicated GPU (graphics processing unit). Although sentiris AV1 was originally designed for image generation applications for flight certification, it is also suitable for other purposes, such as real-time images in medical applications. The product has analog and HD-SDI (high definition serial digital interface) video output, and its video and graphics processing ability can realize 3D images in cab and mission critical applications. Sentiris AV1 provides 512MB ECC protected DDR2 Memory, dual HD-SDI output, and eight channel PCIe (peripheral component fast interconnection). Sentiris AV1 starts at $9980.

Figure 2 quantum 3D’s sentiris AV1 pciexpress intermediate card integrates an FPGA video and graphics processing core to deal with the problem of device update

FPGA technology has excellent parallel processing ability, so it is very suitable for high-performance and multi-channel applications, such as software radio, data acquisition and digital signal processing. For example, Pentek recently launched the model 7151 high-resolution software radio module for GSM (global mobile system) communication, mobile phone monitoring and signal intelligence applications (Figure 4). Four 200MHz, 16 bit ADCs are fed to a proprietary FPGA IP core, which provides 256 DDC channels (digital down conversion). You can configure each group of 64 DDC channels to a special output signal bandwidth, which is suitable for applications requiring mixed signal types or multiple modulation methods. Each DDC group can be obtained independently from any four ADCs and is generally assigned to a specific antenna. Model 7151 enables users to capture hundreds of signals covering a series of modulation modes, signal bandwidth and antenna sources at the same time. Pentek provides readyflow circuit board support package to provide developers with a complete hardware initialization, control and application function library for Linux, windows or VxWorks operating systems. The price of the model 7151 PMC (PCI intermediate card) module version is $14500.

Due to the economic downturn and the reduction of development budget, embedded system designers are turning to FPGA technology

Figure 3 Pentek’s model 7151 software RF module adopts a patented fpga-ip core to provide 256 channel digital down conversion

Embedding standard

The standardization organization of embedded system is also adopting a new design specification based on FPGA hardware. For example, the recently approved Vita (VMEbus International Trade Association) 57.1 FMC (FPGA intermediate card) standard makes it easy for developers to integrate FPGA into embedded system design. This specification defines the I / O devices on the industry standard intermediate card, which you can connect to the FPGA on the substrate. FPGA directly controls these devices. The FMC solution allows you to reuse an FPGA design on multiple projects, simply replacing the I / O part. An FMC module is about half the size of a standard PMC module. Vmetro, a subsidiary of Curtiss Wright, launched the first I / O module based on FMC standard. Adc510 is a rugged version with air cooling and conduction cooling. It integrates two 12 bit, 500 MHz ADC chips for digital signal processing applications, such as radar, signal intelligence and electronic countermeasures.

Low cost commercial embedded modules also use FPGA technology, which provides flexibility for designers of customized applications. For example, the ts-7370 of technological systems is a PC / 104 shape single board computer that can be connected to LCD. The company adopts cirrus ep9302 200 MHz ARM9 CPU and a user programmed lattice xp2 FPGA (Figure 5). The company’s products can be connected to LCD, because the FPGA is connected to a special ram frame buffer, which enables users to establish a custom video core on the FPGA to provide an interface for most color TFT (thin film transistor) LCD panels. Ts-7370 supports a variety of embedded system applications. Its peripheral interfaces include on-board ram, 10 / 100 Mbps Ethernet, USB 2.0 host, serial port, an SD (Digital Security) card slot, ADC channel, digital I / O cable, temperature sensor and a real-time clock. The ts-7370 groundbreaking runs Linux 2.6 for $149 (100 PCS).

When the design team tries to adapt to the reduced budget and increased system complexity, FPGA devices and development tools have also become the main considerations in the new embedded design. FPGA provides a way to establish multiple system configurations with a single hardware design. Reconfigurable devices have special value for high-speed and multi-channel systems, and its performance requirements are difficult to meet with the traditional microprocessor architecture. Although the increased repetitive cost and power consumption requirements of FPGA limit their application, low and medium volume projects can benefit from reduced risk, shortened design cycle and minimum non repetitive engineering, so FPGA is a good choice.

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