The identification and classification of FPGA and CPLD are mainly based on their structural characteristics and working principle. The usual classification method is to call the devices that constitute logical behavior in the form of product term structure CPLD, such as ispLSI series of lattice, xc9500 series of Xilinx, max7000s series of Altera, Mach series of lattice (formerly vantis), etc.
The devices that constitute logical behavior in the form of look-up table structure are called FPGA, such as Xilinx Spartan series, Altera FLex10K or acex1k series, etc. Although both FPGA and CPLD are programmable ASIC devices with many common characteristics, they have their own characteristics due to the structural differences between CPLD and FPGA:
① CPLD is more suitable to complete various algorithms and combinational logic, and FPGA is more suitable to complete sequential logic. In other words, FPGA is more suitable for the structure with rich flip flops, while CPLD is more suitable for the structure with limited flip flops and rich product terms.
② The continuous wiring structure of CPLD determines that its timing delay is uniform and predictable, while the segmented wiring structure of FPGA determines the unpredictability of its delay.
③ FPGA has more flexibility than CPLD in programming. CPLD is programmed by modifying the logic function with fixed internal circuit, and FPGA is programmed mainly by changing the wiring of internal wiring; FPGA can be programmed under logic gate, while CPLD is programmed under logic block.
④ FPGA is more integrated than CPLD, and has more complex wiring structure and logic implementation.
⑤ CPLD is more convenient to use than FPGA. The programming of CPLD adopts E2PROM or fastflash technology without external memory chip, which is simple to use. The programming information of FPGA needs to be stored in external memory, and the use method is complex.
⑥ CPLD is faster than FPGA and has greater time predictability. This is because FPGA is gate level programming, and CLBs adopt distributed interconnection, while CPLD is logic block level programming, and the interconnection between logic blocks is centralized.
⑦ In terms of programming mode, CPLD is mainly based on E2PROM or flash memory, and the programming times can reach 10000 times. The advantage is that the programming information will not be lost when the system is powered off. CPLD can be divided into programming on programmer and programming in system. Most FPGAs are programmed based on SRAM, and the programming information is lost when the system is powered off. Each time the system is powered on, the programming data needs to be rewritten into SRAM from outside the device. Its advantage is that it can be programmed any time and can be programmed quickly in work, so as to realize the dynamic configuration at board level and system level.
⑧ CPLD has good confidentiality and FPGA has poor confidentiality.
⑨ Generally, the power consumption of CPLD is greater than that of FPGA, and the higher the integration, the more obvious.