In the application of motor drive system, polyphase motor drive system can be used in the situation where the supply voltage is limited. Its functions are: (1) solving the problem of low voltage and high power; (2) reducing vibration and noise. As the number of motor phases increases, the output torque ripple decreases and the ripple frequency increases, which greatly improves the low-speed characteristics of the drive system; (3) improves the reliability. Due to the redundancy of the number of phases, the motor can still run when one or even several phases of the multi-phase motor drive system fail. Therefore, the multi-phase motor drive system is particularly suitable for the occasions with high reliability requirements. These advantages of multiphase motor drive system have attracted extensive attention of academic and engineering circles. Because the multi-phase system uses many switching devices and the control system is complex, the performance requirements for the controller of multiphase system are high.
In the three-phase frequency conversion control system, although the structure of DSP control algorithm is complex, it has been widely used because of its high operation speed, flexible addressing mode and powerful communication performance. For the multi-phase variable-frequency control system, the real-time performance of the controller is required to be high, to be able to process a large number of data, and more interfaces are required for PWM driving signals, which can be met by FPGA.
Therefore, based on the three-phase PWM signal generation method, this paper proposes a multi-phase PWM signal generation method based on DSP and FPGA. This method is used to design the multi-phase variable frequency controller, which has certain generality. The number of phases, the waveform of modulation wave and the control method can be set online by the software of the upper computer.
Design idea of multiphase variable frequency controller
The versatility of the multi-phase inverter controller is shown in the following aspects: (1) the phase number of the polyphase motor can be selected; (2) the carrier frequency can be selected; (3) different modulation waves can be selected according to the needs of harmonic injection; (4) different control methods can be selected according to the connection mode of the motor.
In order to achieve the above functions, this paper uses the modular method to design the controller structure. The controller is composed of upper computer, DSP and FPGA. The overall structure diagram is shown in Figure 1.
The operation software of upper computer is realized by object-oriented software. From the control panel, the motor can be controlled to run and stop, and the motor phase number, carrier frequency, modulation wave waveform and dead time can be set.
In order to maximize the advantages of DSP and FPGA, DSP mainly realizes control algorithm, collects feedback signal and communicates with upper computer; FPGA realizes modulation algorithm to generate multiphase PWM signal, which takes up a lot of hardware resources and requires high real-time performance.
The control process is as follows:
(1) The host computer is connected with DSP through serial interface and sends instructions to DSP when action is needed.
(2) DSP calls related functions according to the received instructions, such as initializing the system, running the corresponding control algorithm, and collecting signals.
(3) Through parallel communication between DSP and FPGA, DSP initializes FPGA modulation algorithm and releases PWM blocking. FPGA calculates the received frequency and amplitude to generate PWM signal.
2 multiphase PWM waveform generation
2.1 principle of SPWM waveform generation
The principle of SPWM is shown in Figure 2. A group of isosceles triangle waves are compared with a sine wave, and the intersection point is used as the rising or falling time of SPWM wave. When the amplitude of sine wave is greater than that of triangle wave, the output is high level; when the amplitude of sine wave is less than that of triangle wave, the output is low level.
The basic principle of SPWM generation based on FPGA is to compare the digital signal generated by triangle wave generator with the sine wave signal stored in ROM, and determine the output of SPWM wave according to their size.
2.2 polyphase PWM waveform generation
Figure 3 shows the generation method of three-phase SPWM signal. The function of sequence generator is to generate clock signals of phase a, phase B and phase C in sequence; address synthesis and data separation use the principle of time-sharing multiplexing to reduce the number of ROM used. Polyphase sine wave only needs one ROM, which also creates conditions for external ROM.
Based on the three-phase SPWM signal generation method, this paper proposes a method based on DSP and FPGA that can generate any number of phases and any waveform (i.e. modulation waveform), as shown in Fig. 4.
The phase register stores the information of the phase shift angle between modulated waves (such as 120 ° for three-phase), so setting the phase register is a necessary step to realize multi-phase PWM signal.
The modulation wave control unit is the core part of realizing multi-phase PWM signal. The function of this part is similar to the sequence generator, address synthesis and data separation part in Fig. 3, but with the following differences:
(1) The phase shift between the generated modulated waves can be changed freely by setting the phase register. However, the phase shift in Fig. 3 is fixed and cannot be changed online.
(2) It is specified that the three-phase modulated wave signals constitute a group of modulation wave generators (as shown in Fig. 3), while the modulation wave control unit is composed of multiple groups of modulation wave generators, and the phase shift of corresponding phase difference between groups can be set. For example, in the control of dual three-phase motor, the intra group phase shift is usually set as 120 ° and the inter group phase shift is set as 60 ° or 30 °.
The function of the modulation wave memory is similar to the sine wave ROM in Figure 3. It stores sine wave or modulated wave with harmonic wave calculated by DSP. Every time the controller is powered on, it needs to initialize the modulation wave memory through DSP, and download the modulation wave table calculated by DSP to the modulation wave memory.
The amplitude and frequency of modulation wave are stored in the frequency amplitude register. The amplitude and frequency are calculated by DSP in each control cycle. The carrier frequency of the carrier generator (i.e. triangle wave generator) can be adjusted online; the current dead zone value is stored in the dead zone register, which can also be changed online. The blocking protection unit is used to block PWM output signal and protect the main circuit when the system fails.
Since the digital signal in each register or memory is calculated and generated by DSP, the FPGA must be initialized and set by DSP to realize the above functions.
Realization of 3-phase variable frequency controller
The controller uses DSP TMS320F2812 as the main control chip, which is specially designed for motor control. It not only has the characteristics of fast computing speed, but also integrates rich internal and external equipment resources. The 16 channel 12 bit a / D integrated in TMS320F2812 chip can sample up to 16 channels of current or voltage; the event manager module of TMS320F2812 has QEP circuit, which can decode and count the quadrature coded pulse of encoder, so as to calculate the rotor position and speed of motor.
In order to improve the control accuracy, the FPGA chip ep2c35f484 of Altera cyclone II series is used as the control chip, and the 100 MHz active crystal oscillator is used as the clock input to improve the control accuracy. FPGA not only completes the generation of PWM signal, but also takes into account the task of fault protection. When receiving the external fault signal of a certain phase, it blocks the PWM signal of this phase. The real-time protection of hardware improves the reliability of the controller.
3.1 design of communication interface between DSP and FPGA
In order to ensure the fast communication between DSP and FPGA, DSP uses external interface (xinf) module to connect with FPGA user I / O port. Since the interface voltage of both chips is 3.3 V, the 16 bit data bus and 19 bit address bus of the DSP external interface (xinf) module are directly connected with the user I / O ports of the write signal line xWe and FPGA to realize parallel communication.
The xinf write cycle timing is shown in Fig. 5. As can be seen from the figure, at the falling edge time of xWe, the signal of address line XA has been sent to the bus, while the signal of data line XD has just been sent to the bus; at the rising edge of xWe, the signals of address line Xa and data line XD both exist on the bus for a period of time and have been stable, so FPGA is required to capture the rising edge of xWe and read the signal at this time to ensure the communication accuracy between DSP and FPGA Certainty.
Through the parallel communication experiment of DSP and FPGA, the result is as shown in Figure 6
The measured signal diagram of incremental data (address and data are the same) received by FPGA online from DSP is consistent with the analysis results.
3.2 software design process
The system software is mainly composed of main program and interrupt service program. The main program includes DSP interrupt, peripheral and FPGA modulation strategy
The interrupt service program mainly completes the constant voltage frequency ratio control algorithm, the speed closed-loop PID regulator control algorithm and the refresh frequency amplitude register. The program flow chart is shown in Fig. 7 and Fig. 8 respectively.
4 experimental results
The controller designed in this paper can generate 5 groups of 3-phase (i.e. 15 phase SPWM) signals, with the intra group phase shift set at 120 ° and the inter group phase shift set at 72 °. The phase shift waveform of SPWM 12 in the upper and lower channels of SPWM is observed by using SPWM 12 phase shift waveform diagram of two SPWM channels.
In this paper, a multi-phase PWM signal realization method based on DSP and FPGA is proposed, and a multi-phase inverter controller is designed and implemented. The controller can be used for variable frequency control and selection of control methods for multi-phase motor. Although it is not perfect (such as vector control can not be realized), its versatility and flexibility provide a good experimental platform for the research of multi-phase motor.
Editor in charge: GT