1 Introduction

In the underwater communication system, the design of low-power acoustic signal transmitting circuit plays a key role in the system's operating distance and accuracy. A waveform storage method controlled by CPLD is introduced, which can realize the transmission of acoustic signals in two multiplexing modes of frequency division and code division. After many experiments, the system is feasible. In addition, when designing the CPLD logic circuit, the Xilinx ISE6.2 development system software provided by Xilinx Company was selected, and the Modelsim of Model Tech Company was used to simulate the design.

2 Device introduction

2.1 Introduction to XC2C128

The XC2C128-7V0100 in the CoolRunner-II series introduced by Xilinx. The device uses the second generation of Fast Zero Power (FZP) technology to provide the best performance at the lowest possible power consumption, such as: 1.8 V core voltage, can provide 300 MHz performance, and consumes Work less than 100μA. In addition, the device also has the advantages of small size, low price and high stability, and meets the requirements of the signal transmission system. XC2C128 includes 16 interconnected function blocks (AIM), each AIM can provide 40 inputs for the function block, each function block contains 16 macro cells, these macro cells also contain a large number of configuration registers. In addition, these registers can be preset and reset globally, and can also be set as D or T flip-flops in advance. There are various clock signals, which serve the global or partial routing respectively. For example when synchronizing. Three different clock signals can be applied simultaneously.

The main features of XC2C128 are as follows:

Use 1.5 V, 1.8 V, 2.5 V, 3 V, 3.3 V and other power supplies to supply power, and there are two banks inside, which allows the use of different voltage power supplies without voltage converters;

When powered by 1.8 V, the quiescent current can be as low as 25μA;

Using RealDigital CPLD technology and advanced low-power high-speed programmable logic technology, the static power consumption can be as low as 33μW;

With input hysteresis and programmable ground (GND), improve high-speed I / O signal integrity;

Adopt common JTAG interface;

The chip delay is only 5 ns;

With dual edge flip-flops, it is faster;

It has a 4-level design security function.

When designing the logic circuit of CPLD, choose XilinxISE6 provided by Xilinx Company. 2 develops the system software. ISE is the abbreviation of Integrated Synthesis Environment, which is a comprehensive integrated design platform of XilinxFPGA/CPLD. The tools required for the design flow accelerate the CPLD design development process. The CPLD logic circuit is designed by VHDL input mode, which has strong readability and portability, and is convenient for subsequent modification. After completing the circuit design, use Model Tech's ModellSim to simulate the function of the design to verify whether the circuit function meets the design requirements. Figure 1 shows the connection principle of the CPLD circuit.

2.2 Waveform memory

The waveform memory is mainly used to store the pre-generated sample waveform data. The M27C64A produced by SGS-THOMSON is selected here. Because the device is a low-voltage, low-power 8x8K EEPROM; the programming voltage is 12.5 V, which has the characteristics of high-speed programming and is especially suitable for battery-powered systems. Figure 2 shows its circuit connection principle.

3 System Settings

3.1 Hardware circuit design

Figure 3 presents an overall block diagram of a signal transmitting circuit. In CPLD design, the output frequency of the frequency dividing circuit is used as the clock of the address generator. However, considering that the clock of the address generator should be consistent with the sampling frequency of the pre-stored waveform data, and the storage capacity of the waveform memory is limited, when the sampling frequency is 500kHz, the amount of sampled waveform data is appropriate, so a 16-frequency divider circuit needs to be designed , the frequency dividing circuit divides the frequency of the crystal oscillator with a frequency of 8 MHz. At the same time, according to the number of address pins of waveform memory, a 13-bit address generator is designed. Therefore, according to the design process of CPLD, the design of 16-frequency dividing circuit and 13-bit address generator circuit is completed in ISE6.2, and the synchronous pulse signal and the control signal of each device in the signal transmitting circuit are generated.

Because the transmitted signal is an analog signal, and the waveform data output by the waveform storage circuit is a digital signal, it is inevitable to convert the digital signal to the analog signal, and the D/A conversion circuit is the circuit that completes this function. The signal transmitting circuit D/A converter chooses AD5330 produced by ADI Company. The device is an 8-bit voltage output low-power D/A converter with a microprocessor, small size, and can be directly connected to SPI. It adopts a double-buffer structure and outputs latching, which is suitable for battery-powered systems; when When the supply voltage is 3 V, the operating current is 115 μA, and the shutdown current is 80 nA; when the supply voltage is 5 V, the operating current is 140 μA, and the shutdown current is 200 nA.

At the same time, in order to meet the requirements of the transmission system for the operating distance, it is necessary to use a power amplifier circuit to ensure that the transmitting transducer can obtain sufficient transmission power; and the matching circuit can make the output of the signal transmission circuit have better frequency characteristics and improve the transmission. efficiency. Therefore, power amplifiers and matching circuits are an indispensable part of the signal transmission circuit.

3.2 Software Design

Waveform data in waveform memory due to MATLAB simulation. MTLAB can easily and quickly generate waveform data, and can easily adjust parameters such as signal frequency, period, and pulse width as needed; at the same time, the generated acoustic emission signal has the advantages of low distortion and good consistency. In addition, as a high-level language for scientific and engineering computing, MATLAB also has many advantages such as convenient programming and simple syntax. Therefore, the acoustic signal can be generated by the simulation of MATLAB software. However, due to the large amount of waveform data generated, it is time-consuming and error-prone to directly enter the data into the data memory by hand. For this purpose, the waveform data generated by C language programming will be formed *. hex file format. Then download the entire waveform data to the data memory M27C64A.

By adopting the above method, waveform data generation is simple and fast, data modification is convenient, and the function expansion of the signal transmitting circuit can be realized without changing the hardware circuit. Xinhao, which produces signal waveform data in MATLAB. m file is as follows:

According to the transmission rate of the data acquisition card and the frequency of the transmitted signal, the sampling frequency fs is set to 50 kHz, and according to the capacity of the waveform memory, it is set to 500 kHz, and the generated waveform data is stored in Xinhao. hex. The above program indicates that a group of sine waves are generated every 17 ms, each group is composed of 20 7 kHz sine waves, and the duration of each 20 waves is 2.86 ms. Figure 4 shows that a group of frequencies generated by this program is 7 kHz transmit signal.

4 Experimental results

After the transmitter circuit is matched by the transformer, connect the underwater acoustic transducer, place it in fresh water, and observe the signal received at the receiving end by an oscilloscope. Figure 5 shows the signal (7 kHz) emitted by the transducer in water after using the acoustic signal transmitting circuit: the abscissa is the time, the unit is ms; the ordinate is the amplitude, the unit is mv, Figure 5(b) It is the expanded waveform of the horizontal axis of Fig. 5(a). It can be seen from the oscilloscope that 20 sine waves of 7 kHz appear every 17ms of the signal.

Comparing Figure 4 and Figure 5, it can be seen that the signal generated by the circuit is consistent with the transmitted signal, both of which are pulse transmission. Each group of pulses is 20 sine waves of 7 kHz, and the signal pulse width is 2.86 ms. Attenuated, the amplitude of the signal is 800 mV. In addition, the signal is a single-frequency signal, and other frequencies of acoustic signals can also be generated through MATLAB programming to complete the signal transmission in the frequency division multiplexing mode.

5 Conclusion

A low-power signal transmitting circuit based on CPLD control is proposed, which has scalability and flexibility. The system can be applied to the transmission of signals in water (need to match the transducer) and the transmission of signals in the air. The signal transmission circuit is optimized by the proposed waveform storage method. By changing the waveform memory model or capacity, the signals can be multiplexed in different ways to meet the needs of different situations.

Responsible editor: gt

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