With the continuous update of flat panel display technology, large LED display system uses dot matrix module or pixel unit composed of light-emitting diodes to form a large area display screen, which mainly displays characters, images and other information. It has the advantages of low power consumption, low cost, high brightness, long life and wide viewing angle. In recent years, it has been widely used in stock exchanges, stations, airports, stadiums, road traffic, advertising media and other places.
A single single chip microcomputer is usually used as the main control device to control and coordinate the large screen display. A multiprocessor system composed of multiple single-chip microcomputers, one of which is used as the main CPU and the other as the sub CPU to jointly control the display of the large screen. The system can reduce the burden of the main CPU and improve the refresh frequency of LED lattice. But the driving frequency of MCU is limited, so it can’t drive the LED screen with equal resolution, especially for multi gray color screen, gray modulation is needed to reproduce the color of the image before the data is sent to the display screen, so the processing speed of data is higher, and the speed of MCU control can not meet the above requirements. Therefore, the scheme is mainly used in the situation where the real-time performance is not high. It mainly controls the static asynchronous display of some words and pictures. The frequency of video image signal is high and the amount of data is large, which requires real-time processing. FPGA / CPLD is used to design the control circuit, in which a large number of circuits such as synchronous control, master-slave control, read-write control and gray-scale modulation are integrated to simplify the system structure, facilitate debugging, and the system structure is compact and reliable. Compared with the single chip microcomputer control circuit, the circuit structure is obviously simple, the area of the circuit is reduced, the reliability is enhanced, and the debugging is more simple. Because FPGA / CPLD can process multiple processes in parallel, the efficiency of sequential processing of tasks is higher than that of single chip microcomputer, and the refresh frequency of dot matrix is also increased.
In the case of high real-time requirement and large amount of data, programmable logic device is the preferred core data processor. Considering the requirements of transmitting video data size and driving LED large screen refresh rate, FPGA is used as the core processor of LED sending card and receiving card. The author chooses xc3s250e-ftg256 manufactured by Xilinx company based on 90nm process, which has 250000 logic gates and the highest frequency can reach 600MHz, which can fully meet the requirements of system speed and can be used as scanning control unit in the system At the same time, MCU chip is the main control unit. This scheme can effectively simplify the circuit structure of the display screen, thus improving the flexibility and reliability of the whole control system.
1. Composition and working principle of the system
The control center is composed of 89C51 single chip microcomputer and SDRAM. The scanning control module is composed of xc3s250e-ftg256 and RAM based on the 90nm process of FPGA of Xilinx company. Flash is used as memory module and Ethernet is used to transmit data to form the control system of LED screen. The system structure is shown in Figure 1. Its working principle is as follows: the host transmits the pictures to the Ethernet interface module of the system through TFTP protocol. The Ethernet interface module parses the protocol, receives the picture data, and then transmits the data to MCU, which writes the received data to NAND flash storage module Through SPI interface, the data is transmitted to the FPGA scanning control module, and processed by the scanning control module, it is transmitted to the LED screen for display.
Fig. 1 control system block diagram of LED display based on FPGA and MCU
2 hardware system design
2.1 memory circuit design
In this system, two RAM chips are used as buffer to store video data and read and write fast in Ping Pong mode. At present, there are mainly dynamic memory (DRAM) and static memory (SRAM). SRAM has short read-write time, low static power consumption and high bus utilization rate. It can save the internal stored data without refreshing the circuit. However, it has low integration, large volume occupied by the same capacity and high price. It is mainly used in the field with high performance requirements.
DRAM can only keep the data for a short time. It uses capacitor storage, so it must refresh the circuit frequently to save the data. Its reading and writing process is complex, the time is long, the dynamic power consumption is large, and the bus utilization rate is relatively low. However, DRAM is widely used in servers and computers because of its large storage capacity and low price. Due to the complexity of DRAM reading and writing process, the system requires the memory to have fast read-write response, so SRAM is selected as the memory in the design. The size of LED screen used in this system is 512 × 64, and each pixel data (RGB) takes up 24 bits, then the data amount of a picture is 512 × 64 × 24 = 768kbits. This design selects is61lv25616 chip of ISSI company to store video data. Saa7111 outputs 16bit video signal, and the 16 bit data line is convenient for data storage. The capacity of the system is 256 × 1 024 × 16 bit, which is enough to store a video data, and has enough capacity for future system upgrade. The circuit design of SRAM is shown in Figure 2.
Figure 2 SRAM circuit
2.2 hardware design of FPGA
The hardware design of FPGA is shown in Figure 3. FPGA needs to provide a large number of I / O pins and high-speed display and control signals. The xc3s250e-ftg256 manufactured by Xilinx FPGA with 90nm process can meet the design requirements.
Fig. 3 hardware structure of FPGA
2.3 drive circuit
The voltage of FPGA is 3.3V, and the voltage of LED display circuit is 5V TTL logic level, so the circuit of level conversion is needed. This circuit is composed of 74hc245, and its working voltage is 5V. 74hc245 is a tri state output, 8-group bus transceiver. Its input level is compatible with 3.3V system. It uses external 5V power supply to raise the output level to 5V. At the same time, it provides drive capability for various control and data signals. The circuit of 74hc245 is shown in Figure 4. Among them: OE is the output control pin, low level is effective; dir pin is used to control the conversion direction, when connected to high level, it means conversion from a to B, A0 ~ A7 is used for input data signal, B0 ~ B7 is used for output data signal after conversion.
Figure 4 74hc245 driver circuit
2.4 driving circuit of display board
The area of LED display board is very large. The front of LED display board is cascaded by LED display blocks, and the back side is drive circuit. As the driving current of LED is relatively large, the driving circuit should be close to the LED lattice module as far as possible. Therefore, the row and column drivers are generally installed on the back of the screen. 74HC595 chip is used in the driving circuit of LED display board. It is a CMOS device with silicon structure. It is compatible with low voltage TTL circuit. It has 8-bit Series in and out shift, parallel latch and three state output functions. The shift register and latch use independent clocks, and the data sData is input into the shift register on the rising edge of SCLK and in the latch entered by the rising edge of Lt. When the enable signal OE is low level, the latch’s data output to led.74hc595 chip can solve the problem of time conflict between data display and data serial transmission. The LED data of the next column can be prepared while displaying the data of each column in one row. Taking 1 / 16 line scanning as an example, the driving circuit of LED display board is shown in Figure 5.
CLK is the shift register clock. Each pulse will cause 1 bit of data to be moved into 74HC595. When the data of one row is completely moved, the lock signal LT control data is moved from the register of 74HC595 to the latch. A. B, C and D are line scanning signals, and a is the lowest bit. The line scanning of LED screen is controlled by 4 / 16 decoder. OE is a vanishing signal, which can choose to control the row signal or column signal to control whether the LED dot matrix can be lit and control the brightness of the whole screen. If OE controls the column signal, it is connected to the OE end of 74HC595 chip, because the output of 74HC595 is effective only when OE is low level, otherwise three states are output. If the OE controls the line signal, it is connected to the enable end of the 4 / 16 decoder, and the line scanning does not work at low level.
Fig. 5 driving circuit of LED display board
3 system software design
The software of the whole system includes two parts: upper computer application software and embedded control unit software. The upper computer software can edit the data displayed on the LED display screen and realize the communication with the lower computer; the embedded control unit software realizes the reception and storage, data output and image display mode transformation, so as to realize the control of LED screen.
3.1 upper computer application software
The application software of upper computer is written with Visual C + +, which mainly realizes the functions of editing and communication of display. The software runs in Windows XP environment and is convenient for users. The functions include: (1) editing and modifying the display information, or directly calling 256 color drawing files in windows (BMP); (2) previewing the contents of the display on the upper computer to ensure a better display effect; (3) according to the protocol between the host computer and the I2C interface module, the information is transmitted to the system with I2C interface module to realize the display number According to the update.
3.2 software of embedded control unit
The software of embedded control unit realizes the following three functions: data receiving and storage, data output and image display mode transformation. (1) According to the communication protocol between the display screen and the host computer, the display data is received and stored in flash memory. (2) The data to be displayed is taken out from the flash memory, and the data is processed to achieve the colorful image display effects of up, down, left and right. (3) The data is transmitted to the scanning control module through SPI interface, and the data is converted into the data suitable for the LED screen driver circuit format by FPGA through serial parallel conversion, and then transmitted to the LED screen for display. The simulation is shown in Fig. 6 and Fig. 7.
Figure 6 software simulation display effect
Figure 7 actual display effect of LED display screen
Compared with the traditional LED screen control system based on single chip microcomputer, the system can support 256 gray level full-color picture and text information display, play full-color animation, store large capacity data (64MB), and quickly transmit data through I2C interface, which is a large-scale LED display control system with large display area and frequent display content switching Provide good solutions.