Digital signal processor (DSP) is the combination of digital signal processing theory and VLSI technology. At present, DSP technology is widely used in communication, voice, image, aerospace, instrumentation and other fields, and is playing an increasingly important role in promoting the digitization of contemporary information processing.

In the field of low bit rate multimedia communication using telephone line to transmit video image, if special chips for image processing, such as saa7110 and saa718, are selected × 83104vcp and LSI company’s special chip, or the choice of high-speed computing performance of high-end DSP for image processing, will make the price rise significantly. This paper introduces an image acquisition card based on TI’s low-end DSP chip TMS320F206 and video A / D chip TLC5510, which provides a cheap solution for low bit rate multimedia communication.

Brief introduction of 1tlc5510 chip and TMS320F206 chip

1.1 introduction to TLC5510

TLC5510 is a CMOS, 8-bit, 20 MSPs analog / digital converter (ADC). It uses semi flash architecture. TLC5510 is powered by a single 5V power supply, which only consumes 100MW of power. It also has an internal sample and hold circuit, a high resistance parallel output and an internal reference resistor.

Compared with flash converter, semi flash structure reduces power loss and chip size. The number of comparators can be greatly reduced by implementing the conversion in a 2-step-process. The waiting time for data conversion is 2.5 clock cycles.

Without external reference voltage source and precision resistor, only internal reference resistor and vdda can achieve 2V full scale conversion range. The linearity error at 25 ℃ is 0 ± 75 LSB, and the maximum linear error in the whole temperature range is 0 ± 1LSB。 The difference linearity error at 25 ℃ is 0 ± 5 LSB, and the maximum value of the difference linearity error in the whole temperature range is 0 ± 0.75LSB。

Design of image acquisition card based on DSP chip and video A / D chip

Introduction to 1.2tms320f206

TMS320F206 is a DSP chip produced by TI company. It is a high-speed fixed-point digital processing chip based on TMS320C5X. It has the characteristics of improved Harvard structure (parallel separated program and data bus), high-performance CPU and efficient instruction set. Its main characteristics are as follows

The CPU has 32-bit calu, 32-bit accumulator and 16 bit CPU × It consists of 16 bit parallel multiplier, three shift registers and eight 16 bit auxiliary registers.

The memory has 224k word addressable memory space, 544 word on-chip DRAM, 4K word on-chip SRA or 32K byte flash memory.

The instruction speed is 50ns, 35ns and 25ns single instruction cycle.

The peripheral circuit includes software programmable timer, software programmable waiting state generator, on-chip PLL clock generator, synchronous and asynchronous serial port.

2 hardware interface circuit design

2.1tlc5510 front end circuit design

TLC5510 front-end circuit is shown in Figure 1.

In the circuit, analog power vdda and digital power vddd are independent of each other. 4.7 is used between vdda and digital ground agnd and between vddd and analog ground DGND μ F capacitance, 0.1 μ F capacitor and ferrite ring decoupling and eliminate the power ripple. Agnd is separated from DGND to avoid the noise of analog signal caused by digital signal. The amplified video signal is directly added to the 19 pin of TLC5510. The clock signal of TLC5510 is provided by the clock signal output pin clkout1 of TMS320F206.

2.2tlc5510 and TMS320F206 interface circuit design

The interface circuit diagram of TLC5510 and TMS320F206 is shown in Figure 2.

TLC5510 is digitally connected to the ground of TMS320F206. Because there is a digital output buffer inside TLC5510, the pins of TLC5510 [D1: D8] gntms320f206 [d0: D7] are directly connected. The clkouti pin of TMS320F206 provides clock signal to TLC5510 through a small resistance. TMS320F206 pin a11 and is are logic control. When a11 is logic high and is is logic low, TMS320F206 can read sampling data from TLC5510.

2.3 serial communication between TMS320F206 and computer

The image data stored in TMS320F206 is sent to the computer at 9600b / s through the serial port. The computer stores the data in the buffer area, and then displays it on the display through the pixel to image conversion program.

3 interface programming

3.1 initialization of program constants

(1) Let the starting point of the sampling data storage area be 0900h

(2) Let the number of samples be 1000h

(3) Set a / D address as 0800h

3.2 procedure steps

(1) Initialize TMS320F206

(2) Load appropriate ARN

(3) Strobe TLC5510

(4) Read a / D conversion value

(5) Initialize UART

(6) Transmit data to UART

(7) End of procedure

3.3 specific procedures

.TItle“TLC5510Interface”

.copy“init.h”

.copy“vector.h”

.text

ADC_ Addr.set0800h; Setting the address of TLC5510

Mem_ pointer.set0900h; Sets the starting address of the sampling data store

Count.set1000h; Set the number of samples

start:larar2,#ADC_ Addr

larar3,#Mem_ pointer

larar4,#Count

*Start a / D conversion

ldp#6h; Set the page pointer to 50h × 6 = 0300h

splk#Count,0h; Put the number of samples into 0300h

larar4,#0300h; Make AR4 point to 0300h

mar*,ar4; Set AR4 as the current register

rpt*,ar3; After setting RPTC register, Ar3 is set as current register

in*+,ADC_ Addr,ar4; Read in and store a / D conversion results

*Transmitting data to computer through UART

*Initial UART port

clrcCNF; Mapping B0 block to data space

ldp#0h; Set the leaf pointer to 0h

setcINTM; All interruptions are prohibited

splk#0fffh,ifr; Clearing interruption

splk#0000h,60h

out60h,wsgr; Set zero wait

splk#0c180h,61h; Reset the UART port

splk#0e180h,61h

out61h,aspcr; Open I / O break

splk#4fffh,62h

out62h,iosr; Disable automatic baud rate

splk#00082h,63h

out63h,brd; Set baud rate to 9600

splk#20h,imr; Allow UART interrupt

larar3,#0900h; Restore Ar3

larar4,#(Count-1); Restore AR4

mar*,ar3; Set Ar3 as the current register

clrcintm; Turn on interrupt

uart1:setcxf; Set XF to 1 and start data transmission

mar*,ar3; Set Ar3 as the current register

out*+,adtr; After the data is sent out, add Ar3 to 1

wait:clrcxf; Close XF and stop data transmission

mar*,ar2; Set Ar3 as the current register

in*,0fff6h; Read and play the status of iosr register

bit*,4; Check whether the 12th bit is 0

bcndcont,tc; If 0, wait until bit 12 of iosr is 1

bwait

skip:splk#0020h,ifr; Clearing interruption

clrcintm

mar*,ar4; Number of transmissions minus 1

banzuart1,ar3; If not, skip to uart1 and pass the next number

ret; return

inpt1:ret

inpt23:ret

timer:ret

uart:ret

codtx:ret

codrx:ret

.end

The interface design of TLC5510 and TMS320F206 is used in the remote multimedia low bit rate communication monitoring system in coal mine, which has made preliminary progress. This application can provide an idea for TMS320F206 to be used in image processing, thus opening up a cheap way for low bit rate multimedia communication.

Editor in charge: GT

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