Based on smic0.18umcoms process, a CMOS voltage controlled oscillator with wide frequency, low power consumption and low phase noise is designed. The circuit adopts differential LC oscillator, and adopts accumulation MOS variable capacitor, buffer circuit and improved switched capacitor array to reduce power consumption and phase noise. The simulation results show that the frequency tuning range of the circuit is 2.5G ~ 3.1g, and the phase noise distribution is 1 MHz At – 118dbc / Hz to – 122dbc / Hz, the working current is less than 10mA, which meets the design requirements and can be applied to DRM / DAB receiver.
DRM: digital radio mondiale
DAB: digital audio broadcasting, namely Eureka-147 system in Europe, is a digital technology used in radio broadcasting in some countries.
1. Application of VCO in receiving
The position of VCO in the system is shown in Figure 1. It belongs to the loop part. The former stage is the loop filter, and the latter stage is the multi-mode frequency divider and programmable frequency divider.
Figure 1 VCO position in DRM / DAB receiver
The loop filter supplies the control voltage generated by PFD (phase frequency detector) and CP (charge pump) to VCO after filtering. VCO generates the oscillation signal of corresponding frequency according to the control voltage (VCON) and control word (controlled by I2C). The oscillation signal is supplied to the local oscillator (LO) as a frequency source through the multi-mode frequency divider, and also fed back to PFD and CP through the programmable frequency divider. The frequency of VCO output oscillation signal is n times of PLL input signal (PFD / CP input) frequency (n is the frequency division ratio of programmable frequency divider), that is fout = nfin.
2. Circuit design
2.1 VCO circuit diagram
Figure 2 shows the general circuit diagram of VCO, which adopts the classic complementary differential coupled VCO structure and removes the tail current, so that the phase noise performance is significantly improved. M1 and M2 are NMOS differential coupling pairs, m3 and M4 are PMOS differential coupling pairs, the complementary differential coupling pair is easier to start vibration, has the advantages of power consumption and amplitude, and has less phase noise; switched capacitor array (SCA) is used to broaden the frequency tuning range without excessive voltage control gain; SCA is controlled by the control word to coarse tune the capacitance in the resonator. The variable capacitor is used to fine tune the capacitance in the resonator under each control word. L is the inductance in the cavity. The buffer circuit is used to further amplify the output signal of VCO to improve its ability to drive the later stage. At the same time, it also isolates VCO from its later stage circuit to avoid the influence of the later stage circuit on the oscillation frequency and phase noise performance of VCO.
Figure 2 general circuit diagram of VCO
Figure 2 shows a complementary LC cross coupled oscillator, which uses two pairs of differential coupled amplifiers (NMOS and PMOS) to provide negative resistance to compensate the energy loss of the resonant circuit. For the same bias current and MOS transistor size, the negative resistance of the complementary structure is twice that of the single MOS transistor structure, which makes the circuit easier to start up. Because NMOS and PMOS provide current to each other respectively, the current can be reused to increase the swing of the oscillator output signal. By optimizing the device parameters, the output voltage waveforms of the two output terminals and the intermediate circuit nodes are symmetrical, so as to reduce the phase noise of the oscillator as much as possible.
Complementary LC cross coupled oscillator has obvious advantages in output signal amplitude, power consumption and phase noise.
2.2 variable capacitance
This circuit uses the accumulation type MOS variable capacitor, belongs to the active device, when uses needs to add the bias circuit. Figure 3 shows the circuit diagram of the variable capacitor. R1, R2, R3 and R4 provide bias for the variable capacitor tubes. C1 and C2 are isolated capacitors, which make the bias circuit of variable capacitor independent of other circuits. VCON is the control voltage and the output of the loop filter, which is used to control the capacitance value of the variable capacitor.
Fig. 3 circuit diagram of variable capacitor
2.3 switched capacitor array (SCA)
Figure 4 shows the circuit of switched capacitor array. There are four control words d0, D1, D2 and D3, and there are 16 combinations. CF is the filter capacitor. Figure 5 shows the MOS switch used in the switched capacitor array. The inverter is added between the control word end and the source (drain) end, and the digital analog is mixed, so that the voltage of the source (drain) electrode of the MOS switch has a certain value (low or high) and is always greater than or equal to 0, making the switch circuit insensitive to noise.
Figure 4 switched capacitor array
Figure 5 MOS switch
2.4 buffer circuit
The buffer circuit is shown in Figure 6, which consists of an inverter and a push-pull amplifier. The two-stage circuit has high isolation. RB1 and Rb2 are bias resistors; RF is feedback resistor, which can make the circuit more stable; cd0, CD1 and CD2 are isolated resistors, which make the bias of each circuit independent of each other.
Figure 6 buffer circuit
3. Simulation results
3.1 working current
Figure 7 shows the working current obtained by simulation, with an average value of 4.75ma. If the overshoot current at the time of starting vibration is removed, it can basically reach 4mA. Table 2 compares the working current of each process angle. It can be seen that the working current is about 5mA in the worst case, and the power consumption meets the design requirements.
Table 1 operating current under control word 0111
Figure 7 operating current (0111 TT)
3.2 transient characteristics
Figure 8 shows the results of the transient simulation. After setting a voltage of 500mv in the initial condition, VCO can start to vibrate quickly, and the oscillation curve and frequency are normal, realizing the basic functions of VCO. The results are similar in other conditions.
Figure 8 transient simulation results (control word is 0111 VCON = 0.9V, TT)
Figure 9 voltage control characteristic curve (TT)
Figure 10 phase noise curve (control word 0000, VCON = 0.9, TT)
3.3 voltage control characteristic curve
Figure 9 shows that the voltage control characteristic curve of TT process angle is 2.5G ~ 3.1g, achieving a wide tuning range while maintaining a low voltage control gain. When the control word is 1110, the voltage control gain is low, and the average value is about 60MHz / v. The results are similar in other conditions.
3.4 phase noise
Figure 10 shows the phase noise curve obtained by simulation under 0000 control word. By analyzing the phase noise of different process pins, it can be seen that the phase noise decreases with the increase of control word. Therefore, after the phase noise simulation of all control words of TT process angle, only the phase noise of the first control word and the last control word of FF and SS process angle as well as a part of the middle control word is needed The phase noise performance of all control words can be known by simulation. When the frequency offset is 1MHz, the phase noise is basically distributed between – 118dbc / Hz and – 122dbc / Hz, which basically meets the requirements of low phase noise.
This paper designs a voltage controlled oscillator which can be used in DRM / DAB receiver, and improves the common circuit structure to reduce the power consumption and phase noise. Through simulation analysis, the performance meets the design requirements, but there are still some areas that need to be improved. In the follow-up design, we should further optimize the bias voltage of the variable capacitor and improve the algorithm to improve the linearity and phase noise of the voltage controlled gain curve The smoothness of bit noise curve.
Editor in charge: GT