Many fast ADCs recommend a 0.6V “2.6V input voltage range, such as National Semiconductor’s adc1175 (reference 1). But in some applications, it is necessary to convert a symmetrical analog input signal. The circuit in this design example converts a symmetrical input voltage in the range of – 0.2V “+ 0.2V to the recommended range of 0.6V” 2.6V “(Figure 1). The circuit can also prevent the output voltage from falling below – 0.3V to prevent damage to ADC.
A ad8002 dual current feedback operational amplifier of analog devices is used to achieve high bandwidth (reference 2). In the first part, the voltage gain of non inverting amplifier ic1a is 5. This part has high input impedance and low output impedance, which makes the second part ic1b work normally. The second part undertakes most of the tasks. Ic1b, R4 and R5 constitute a basic inverting amplifier. The clamping effect can be obtained by adding R3 and D1. R3, D1, R4 and R5 determine the clamping level. In addition, the current IDC bias the output voltage. The resistance of adjustable potentiometer P1 can be adjusted to obtain the required output voltage offset, such as 1.6V.
If the current of diode D1 is negligible, the output voltage Vo is: – (1 + R2 / R1) ×（ R5/（R3+R4）） × VI+VCC × R5/（R6+P1+R7）=1.6-5 × VI。 Assuming that the diode voltage vdiode is 0.6vs, VO = – (R5 / R4) × VDIODE+VCC × R5/（R6+P1+R7） = 1.6-1.65=-0.05V。
The clamp of protection ADC appears near 0V. Increasing the clamp level will reduce the linearity of the circuit in the non clamp region. In other words, there is a design tradeoff between clamping level and linearity. Resistor R8 limits the current through the input of the ADC. Capacitor C2 is optional, which limits the vadc / VI bandwidth. Capacitor C1 reduces noise from the – VCC power supply.
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