1 Introduction

EEG (electroencephalography) is a basic physiological signal of human body, which has important clinical diagnosis and medical value. Due to the nonstationary and random characteristics of EEG, it is very difficult to filter real-time signals. Since Berger discovered EEG in 1929, many kinds of digital signal processing techniques have been used to process and analyze EEG signals. Because the filters used in traditional filtering denoising methods generally have low-pass characteristics, the classical filtering method is used to denoise non-stationary signals, reduce noise, broaden waveform, and smooth the components of abrupt peaks in signals, However, the important information carried by these mutation points may be lost, and Fourier spectrum analysis is only a pure frequency analysis method, which is invalid for time-varying non-stationary EEG signals.

Compared with the traditional Fourier transform, wavelet transform is a multi-scale signal analysis method, which has good time-frequency localization characteristics. It is very suitable for analyzing the transient characteristics and time-varying characteristics of non-stationary signals. This is just what is needed to analyze EEG. Many lesions in EEG are expressed in the form of transient. Only by combining time and frequency can better effect be achieved. But wavelet decomposition only decomposes the low frequency part of the last decomposition, not the high frequency part, so the resolution of high frequency band is poor. Wavelet packet decomposition is a more detailed signal decomposition and reconstruction method extended from wavelet decomposition. It not only decomposes the low frequency part, but also decomposes the high frequency part twice, which can adjust the frequency resolution to be consistent with the characteristics of EEG rhythm. Therefore, wavelet packet decomposition has better filtering characteristics. If wavelet packet method is introduced into EEG analysis, it can not only overcome the shortcomings of traditional EEG analysis, but also improve Mallat algorithm to analyze the actual EEG.

In the past, the digital processing of EEG signal was realized by general PC or single chip microcomputer, but the real-time performance was poor. Then, wavelet transform based on FPGA emerges as the times require in EEG digital processing, which has good real-time performance. DSP Builder combines the algorithm development, simulation and verification functions of MATLAB / Simulink design simulation tool with HDL synthesis, simulation and verification functions of Quartus II software to provide a good platform for FPGA of wavelet transform.

Improved Mallat algorithm of 1d-dwt

Multi resolution analysis is the core theory of wavelet analysis, and Mallat algorithm is a common algorithm for signal wavelet decomposition and reconstruction. The decomposition and reconstruction formula of orthogonal wavelet is determined by the scale equation coefficient of scale function. Suppose the scaling function of orthogonal wavelet is constructed φ( t) The two scale equation is as follows

Design and implementation of wavelet transform based on DSP Builder

because φ(- t) And φ( T-S) is the scaling function of multiresolution analysis for constructing orthogonal wavelets, so h (n) can be taken as H (- n) or H (N-S) in the above decomposition and reconstruction formula. For the convenience of discussion and without losing generality, the above decomposition formula and reconstruction formula can be rewritten as follows:

Design and implementation of wavelet transform based on DSP Builder

Then C0 (k) = C0 (k-2n-1), and the signal obtained by equation (13) is the delay of the signal obtained by equation (12). Since sequences H (n) and G (n) are causal sequences, the filter corresponding to equation (13) is causal filter. Using equations (7) and (8) to decompose the low frequency component or the low frequency component and the high frequency component of the signal, the multi-level decomposition or wavelet packet decomposition can be obtained.

Design and implementation of wavelet transform based on DSP Builder

Considering the short-term characteristics of the transient pulse signal, the daubenchies wavelet with compact support set is selected as the analysis wavelet, which is conducive to highlight the characteristics of the transient signal. DB wavelet function has good orthogonality and tight support, which can better show the continuity and mutation of the frequency domain signal, and has good effect in practical engineering application. So DB wavelet is used to decompose and reconstruct EEG signal in four levels. The DC component or slow baseline drift in EEG signal was filtered out. Select DB2 wavelet, M = 3, and the low-pass filter coefficients (scale function coefficients) are as follows:

Because the implementation of floating-point number in FPGA is relatively complex, in order to reduce the computational complexity and resources of FPGA, the filter calculation can be converted into integer operation and shift operation. Therefore, the above filter coefficients need to be converted into integers first, and each filter coefficient is quantized by 16 bit word length, that is, the integer is taken after multiplying by 215, and the actual output is obtained by shifting the output signal of the filter by 15 bits.

Using DSP Builder as the platform, the system level modeling and Simulation of Eq. (7), Eq. (8) and Eq. (13) algorithms are carried out. Then the HDL file is generated by signal compiler, and the timing simulation is verified by Quartus II.

3.1 implementation of LD DWT decomposition with DSP Builder

The structure of the decomposition module is shown in Figure 1. The signal is output from the 4-stage delay line in parallel, convoluted with the FIR filter coefficients, and then even decimated to obtain the approximate and detailed results. The second extraction module uses the down sampling module of DSP Builder, and uses signal compiler to generate HDL files.

Design and implementation of wavelet transform based on DSP Builder

In order to reduce the hardware resources consumed by the system, the lower 8 bits of the output result are discarded to ensure the same energy level of the signal before and after decomposition. It can be seen from Figure 1 that each sub module works in parallel, no cross signal is needed between sub modules, and the data is transmitted backward from the input end in a pipeline way to realize real-time pipeline work. The design principle of two-level decomposition module is the same as that of one-level decomposition module.

3.2 implementation of 1d-dwt reconstruction with DSP Builder

According to Mallat algorithm, the structure of reconfiguration module is shown in Figure 2. Firstly, the signal is interpolated twice, and then the signal is output from the four stage delay line in parallel and convoluted with the FIR filter coefficients respectively. The difference from decomposition is that the reconstructed signal has two input channels, which are convoluted with the FIR filter in parallel after four stage delay. The reconstructed signal can be obtained by superposition of the obtained results, and then the HDL file is generated by signal compiler, The reconfiguration module also works in pipeline mode. The secondary capture module is implemented by the up sampling module of DSP Builder.

Design and implementation of wavelet transform based on DSP Builder

4 Simulation and design

Select a group of original data [1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11…] as input signal, and use the HDL file generated in Figure 1 to simulate the time sequence in Quartus II environment. Figure 3 shows the time sequence simulation waveform of first-order wavelet decomposition. Using the HDL file generated in Fig. 2, and taking the output results of low frequency and high frequency in Fig. 3 as the input data of reconstruction, the first level wavelet reconstruction simulation is carried out, and the simulation waveform is shown in Fig. 4. It can be seen from Fig. 3 and Fig. 4 that the reconstructed waveform has no distortion except for delay, and can perfectly reconstruct the original signal, that is, the input and output satisfy Q (n) = Xin (n-k).

Design and implementation of wavelet transform based on DSP Builder

The multi-scale decomposition and reconstruction method of wavelet transform is used to filter out some components (high frequency or low frequency) of the signal. The DB2 wavelet is used to decompose the EEG signal into four levels of wavelet packet. According to the principle of wavelet packet decomposition, the first level decomposition module is cascaded, and the input data is reduced to half of the original. The frequency division module is used to control the clock signals at all levels, The frequency division module is written and generated by VHDL language. Three clock signals are synchronously output as the clock input signals of the last three stages. Then, the decomposed output signal is reconstructed by four levels of wavelet packet, which is processed in the same way, cascaded with one level reconstruction module, and the output data is doubled every time. This paper attempts to use PLL to control all levels of clock signals. The PLL is implemented by the function module of Quartus II, and outputs three frequency doubling clock signals at the same time as the input clock signals of the post-i reconstruction part.

5 Conclusion

The wavelet packet is used to decompose the high-resolution time-frequency relationship. In the filtering part, causal filter is selected to filter EEG signals in real time. On the DSP Builder platform, combined with Mallat algorithm and modular design principle, a pipeline structure wavelet transform system based on FPGA is designed. This top-down highly modular design method makes the upgrade and modification of the system quite convenient. It is the future research direction to apply this FPGA based wavelet transform system design to the real-time filtering of EEG signals.

        Editor in charge: PJ

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