Top1 electronic wallet circuit design based on NFC technology control

NFC has the characteristics of two-way connection and recognition. It works in the frequency range of 13.56MHz and the operating distance is close to 10cm. NFC technology promotes standardization under the framework of ISO 18092, ECMA 340 and ETSI TS 102 190, and is compatible with the widely used non-contact smart cards of ISO 14443 type-A, B and felica standards. Pn544 conforms to the latest NFC specifications formulated by ETSI, and can provide a fully compatible platform for mobile phone manufacturers and telecom operators to launch the next generation of NFC devices and services: pn544 is fully compatible with all the NFC specifications that have been released to connect SIM card and host controller interface (HCI) through one line protocol (SWP).

NFC RF circuit is composed of EMC filter circuit, matching circuit, receiving circuit and antenna. The system is based on 13.56MHz operation frequency. The frequency is generated by quartz crystal oscillator. At the same time, high-order harmonics will be generated. In order to comply with the internal electromagnetic compatibility rules, the third, fifth and above order harmonics of 13.56MHz must be properly suppressed. Therefore, the EMC circuit is configured as an LC low-pass filter to filter high-order harmonics.

  Design of antenna matching circuit

Because the antenna coil itself is a low impedance device, in order to maximize the energy sent by NFC IC to the antenna, a matching circuit must be added between the antenna and NFC IC. The energy loss caused by signal reflection due to mismatch is eliminated. The receiving circuit is composed of r127, c118, r128 and c119. The VMID potential generated in the chip is used as the input potential of Rx pin. In order to reduce the disturbance, the capacitance is used to ground the VMID. The bias voltage of VMID can increase the voltage drive of Rx pin. Figure 2 shows the NFC RF receiving circuit.

  Collection of circuit diagram design based on NFC Technology

Figure 2 RF circuit of NFC

The NXP practical NFC e-wallet solution in this paper is based on the 13.56MHz operating frequency and mobile phone as the trading platform. The NXP pn544 NFC controller (pn65o has built-in security module) and security module realize the functions of mobile payment and data exchange, providing convenient, safe and extraordinary experience for electronic payment.

  Circuit design of universal card reader based on NFC

In many current RFID applications, device manufacturers may not be able to decide which transceivers to use, especially transceiver chips. Therefore, in order to maximize the chance of winning the bid in a specific project, the equipment manufacturer must provide such a reader, either it can support as many transceiver chips as possible in the market, or it is relatively easy to customize. In addition to supporting a series of protocols, standards and transceivers, customers may have other functional requirements for the reader, such as high performance, anti-collision, remote / near sensing, mobility and power consumption. But in a single reader, it is difficult to meet so many requirements at the same time. In order to meet all these requirements, manufacturers may need to provide a series of readers that can meet different requirements.

Em4094 is an integrated transceiver chip, which can be used to build analog front-end module of RFID reader. The data transmission and receiving link of the chip allows transmission and decoding of any communication protocol. Therefore, em4094 supports all 13.56MHz transceiver chips of EM company, iso15693, iso14443 A & B, and Sony felica protocol. With proper settings, em4094 can even communicate with NFC devices. This paper will explain how a hardware engineer should integrate and use em4094 RFID reader circuit through a series of steps.

  Collection of circuit diagram design based on NFC Technology

Figure 1: typical application circuit configuration.

  Design of antenna driver output circuit

Ant1 and ant2 are the two outputs of the antenna driver. They can be driven in the same phase or in the opposite phase, which makes it possible to connect the reader antenna in different ways and generate four antennas with different power levels according to the selected structure. The em4094 can also be used with a remote antenna, where the output impedance of the em4094 (see Figure 3) must match the impedance of the communication line.

  Circuit design of universal card reader based on NFC

Figure 3: impedance matching circuit.

If coaxial cable is used, the output impedance of em4094 must be adjusted between 10 ohm (Ant1 optional) and 50 ohm when only one antenna driver is used; When two antennas are used in parallel, the output impedance of em4094 will have to be adjusted from 5 ohm (Ant1 transitive) to 50 ohm. In order to achieve a good impedance matching, developers can use Smith chart to select an LC PI network and select appropriate component parameters.

If the reader antenna can be integrated with em4094 on the same PCB, you can use the direct antenna connection method (see Figure 2). In this case, the antenna and series capacitor form LC series circuit. The resonant frequency of this circuit is the frequency of the card reader. The series resistor is used to suppress the quality factor and set the current of the antenna below the rating of em4094. When the antenna works at its resonant frequency, a higher power can be obtained by directly connecting the antenna. For different connection modes of IC antenna, please refer to em4094 Application guide.

  Circuit design of universal card reader based on NFC

Figure 2: direct antenna connection.

Transceiver signal reception

Rfin1 and rfin2 are the two input pins on the IC receiving chain. They are used by em4094 to demodulate the data stream sent by the transceiver. The voltage on the pins must be set between GND and VDD. The two demodulation inputs must have the same performance and sensitivity. With an external matching impedance circuit, the two inputs can be used to demodulate the input phase or amplitude modulated signal. Unused input pins should be connected to analog ground via a 10nf capacitor. The high sensitivity of the input pin enables the reader to have a long reading distance even at the minimum power level of the tag.

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