Authors: V í ctor mayoral vilches and Giulio Corradi, Xilinx

Serial 3: why FPGA can play an important role in robots

CPU and GPU are good at control flow computing. Their control driven machine model is based on the control token, which indicates the time when the statement should be executed. This gives the CPU and GPU complete control, and can easily realize complex data and control structures. However, the cost of doing so is low efficiency and it is difficult to program accurately without errors. On the contrary, FPGA is good at data flow operation. They follow the pattern of data-driven machines and execute statements as soon as all operands are available. As a result, FPGA can release huge parallelism and throughput potential, while avoiding errors or side effects.

In general, as an alternative technology to the general platform of CPU and GPU, FPGA can adaptively generate customized computing architecture to meet the needs of robots. Because it has unprecedented flexibility, can shorten the design cycle, and reduce the development cost, FPGA has been Z widely used in various well-known industrial robot manufacturers and medical robot applications. In “a survey of FPGA based robotic computing”, readers can see a survey on FPGA based robot computing, which shows the wide applicability of FPGA in the field of robot applications. The following is a detailed description of FPGA features:

• adaptive: when control flow and data flow are required at the same time, CPU and GPU cannot be used because of delay and response time, while FPGA can generate unparalleled customized computing architecture to meet strict real-time requirements and multiple critical requirements. The fixed computing architecture adopted by CPU and GPU limits their overall capabilities, including response time and delay.

• high performance: FPGA improves computing performance by establishing a deeply pipelined data path (stream computing), rather than relying on the increase in the number of computing units like CPU and GPU. The working principle of stream computing is that the data generated by one computing unit is immediately processed by the next computing unit in the pipeline, which eliminates the “fetch compute store” link in the data stream channel, facilitating the operation of data producers and consumers, thus improving performance. On the contrary, due to multiple restrictions such as fixed architecture, fixed number of cores, fixed instruction set, rigid memory architecture, CPU and GPU can only calculate at the expense of performance.

• high energy efficiency: speed and power consumption are the basic quality factors (FOM, figures of merit) of digital circuits. Power is a function of digital circuit frequency and trigger rate. FPGA adjusts the frequency through parallel and direct execution algorithm. FPGA maintains low frequency and low switching rate (no instruction acquisition) for calculation, but compared with the equivalent computing performance of CPU and GPU, FPGA has greater parallelism advantage at higher frequency, so that customers can achieve better power index and higher energy efficiency.

• no waste of computing power: FPGA maximizes chip utilization with flexibility to improve performance. Dynamic function switching (DFX, formerly known as “partial reconfiguration”) allows threaded applications running on the CPU to share FPGAs time-sharing. Thus, when a given thread is processing the results generated by FPGA, another thread can use FPGA for different calculations.

• predictability: FPGA helps CPU and GPU unload real-time computing in a strict sense, provides nanosecond prediction ability in execution time, and will not be affected by software changes or jitters related to GPU and CPU computing.

• reconfigurable: robot algorithm is still in high-speed evolution and development, and FPGA can be dynamically reconfigured and updated on demand. In addition, FPGA can be easily reprogrammed to meet heterogeneous requirements and realize the common capabilities that CPU and GPU can provide.

• safety: FPGA can flexibly build safety circuits on demand to ensure the safety of robot data flow. In addition, FPGA can make full use of the reconfiguration function to correct the defects of its hardware architecture (avoiding hardware risks). In this way, designers can quickly solve the security risks that are difficult or impossible to solve on the fixed computing architecture (avoiding future risks, such as “meltdown” and “ghost”).

However, it is also believed that although FPGA is the ideal computing backbone in the eyes of roboticists, the flexibility they provide is at the cost of increasing complexity and required design skills. “A survey of FPGA based robotic computing” lists some additional skills required. Only by comprehensively using all these technologies including multi-core CPU, GPU and FPGA, can the best robot performance be achieved. In fact, this integrated system on chip (SOC) solution provided by Xilinx is a perfect combination of the programmable ability of CPU general software and the adaptive hardware function of FPGA in the same device.

These adaptive SOCS provide a highly flexible Computing Foundation with both software and hardware for robot applications, and can provide values such as high performance, low power consumption, certainty, hardware reconfigurability, security, and adaptive characteristics.

Summary of key points: CPU and GPU are good at control flow calculation, while FPGA is good at data flow calculation. The adaptive SOC solution provides a highly flexible computing backbone with both software and hardware for robot applications, which can provide low power consumption, high performance, certainty, hardware reconfigurability, security, and adaptability.

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