1、 The current development of EDA industry and the key applications to promote the development of the industry

EDA industry is undergoing great changes. Although the number of initial designs is decreasing at present, and this trend will continue for some time to come. However, the demand of chip complexity and resources for emerging silicon chip design is increasing. This leads to the coexistence of opportunities and challenges in EDA. For example, the development speed of mobile handheld application market is far faster than that of other electronic markets, and the most complex and challenging chips are used in this kind of application. Which EDA company can provide solutions with faster speed, higher capacity, close integration, various advanced functions and silicon chip verification, which EDA company has huge business opportunities.

2、 The latest development trend of EDA

Better, faster and more economical will still be the main development trend of EDA industry. The latest trend is that IC chip manufacturers are integrating more functions in a single chip. As a result, each chip is a mixed signal chip, each chip runs multiple power domains, and each chip integrates various digital and analog IP with more memory.

Analysis on the development status of EDA industry and its key application

3、 Weakness and problems of EDA industry

EDA industry is restructuring to cope with the complexity of chip size, mixed IP and process variability. EDA solutions must make full use of a large number of computing resources to improve capacity and shorten the design cycle, must achieve a higher level of integration to eliminate pessimism and miscorrelation between different tools, and must accurately and quickly complete the modeling of the entire series of IP and seamlessly integrate it with the rest of the design.

4、 Views on mixed signal design

At present, most chips are mixed signal chips. The problem of mixed signal design is affecting everyone. Traditional EDA solutions assume that digital design and analog design are separated from each other and have well-defined boundaries, so the dependence between the two designs is negligible. In the end, the two designs can only be implemented in their own areas, using their own tools, and only in the final stage of chip assembly can they be integrated together. This is an increasingly inefficient development model. The advantages of design and implementation of smaller process nodes are promoting the migration of simulation design to smaller process nodes at a faster speed. The simulation designer must adopt the updating method to overcome the limitations and complexity of the design of process nodes of 90nm and below, such as proximity effect, high parasitic parameters and lower supply voltage. SOC designers no longer manually partition analog and digital design, to avoid the exchange of these two aspects. The top-level chip routing and finishing have a great impact on the performance of the chip, which can not be completed without considering the overall chip plan.

5、 Significant progress has been made in the design of the latest process nodes similar to 20 nm or below

The complexity of 20nm nodes is forcing design companies to redesign the design process, or at least review the design steps. This redesign extends the hardware requirements from dual pattern routing, extraction and splicing, analog design with limited transistor options and voltage margin reduction to other problems such as eliminating redundant tolerance, eliminating error correlation source and processing corner mode surge. By adding new integrated solutions, the EDA industry will protect designers from laborious and time-consuming processes and find out the work areas limited by traditional EDA solutions.

6、 For EDA industry, the industry solution provided by weijiecode

At the dac2011 conference, microjet introduced a new solution called silicon one, which can solve various problems of emerging highly integrated mixed signal chips. The silicon one solution of Weijie code is based on three principles: first, the whole product line of Weijie code runs based on a unified integrated data model, which can achieve concurrent optimization across different tools without introducing wrong Association; second, Weijie code provides a complete mixed signal design platform from characterization to design implementation to design signature in a single environment Thirdly, the whole product line can make full use of the current computing resources through re architecture or further enhancement. This enables the silicon one solution to achieve significant throughput improvement without affecting chip performance. The integration of silicon one solutions combined with the innovative technology of Jinwei Jiecode is committed to bringing the productivity and design quality of mixed signal chip designers to a new level.

7、 The future of EDA industry

The number of initial design cases continues to decline, while the complexity of chips continues to rise. Although the number of companies engaged in these complex chips is decreasing, the resources invested in chips by EDA industry are increasing, and the expectation of return on investment is also increasing. EDA will continue to pay close attention to chip integration. High growth applications in the mobile market, cloud market and consumer market all require chip integration. The electronic market is growing. For companies planning to join the market, it is the best time to prepare and plan in advance for the development of 20nm and below designs.

Editor in charge: Tzh

Tagged:

Leave a Reply

Your email address will not be published. Required fields are marked *